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path: root/src/cpu/simple
AgeCommit message (Expand)Author
2020-01-23cpu: Consolidate and move the CPU's calls to TheISA::initCPU.Gabe Black
2019-12-11cpu: Replace empty byteEnable check with Request::isMaskedGiacomo Travaglini
2019-12-11cpu: Fix coding style (byteEnable->byte_enable)Giacomo Travaglini
2019-12-11cpu: Add byteEnable assertions to readMem and initateMemReadGiacomo Travaglini
2019-12-10arch,cpu,sim: Push syscall number determination up to processes.Gabe Black
2019-12-03cpu,sim-se: move error checks in syscall methodsBrandon Potter
2019-11-02arch,cpu: Move endianness conversion of inst bytes into the ISA.Gabe Black
2019-10-25cpu: Get rid of the serviceInstCountEvents method.Gabe Black
2019-10-25cpu: Access inst events through ThreadContext instead of the CPU.Gabe Black
2019-10-25cpu: Make accesses to comInstEventQueue indirect through methods.Gabe Black
2019-10-25cpu,sim: Delegate PCEvent scheduling from Systems to ThreadContexts.Gabe Black
2019-10-25cpu: Make the ThreadContext a PCEventScope.Gabe Black
2019-10-25cpu: Pass the address to check into the PCEventQueue service method.Gabe Black
2019-10-21cpu: Apply the ARM TLB rework to the checker CPU.Gabe Black
2019-10-17cpu: Get rid of load count based events.Gabe Black
2019-10-15sim,cpu: Get rid of the unused instEventQueue.Gabe Black
2019-09-23cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>Jordi Vaquero
2019-09-04cpu: reset byte_enable across writeMem callsCiro Santilli
2019-08-28cpu: Make get(Data|Inst)Port return a Port and not a MasterPort.Gabe Black
2019-07-16cpu: isDrained renamed to isCpuDrainedGiacomo Travaglini
2019-05-28cpu: Remove assert causing issues with x86 Linux bootGiacomo Gabrielli
2019-05-11cpu,mem: Add support for partial loads/stores and wide mem. accessesGiacomo Gabrielli
2019-05-11cpu: Add a memory access predicateGiacomo Gabrielli
2019-04-30cpu: alpha: Delete all occurrances of the simPalCheck function.Gabe Black
2019-04-30cpu: Remove hwrei from the generic interfaces.Gabe Black
2019-04-30arch: cpu: Track kernel stats using the base ISA agnostic type.Gabe Black
2019-04-29cpu: Get rid of the (read|set)RegOtherThread methods.Gabe Black
2019-04-28mem: Minimize the use of MemObject.Gabe Black
2019-04-05cpu: Correctly account for executed instructions in simple cpusNikos Nikoleris
2019-03-28cpu: Added a probe to notify the address of retired instructionsJavier Bueno
2019-02-12python: Don't assume SimObjects live in the global namespaceAndreas Sandberg
2019-02-08cpu: support atomic memory request type with AtomicOpFunctorTuan Ta
2019-02-01cpu, arch: Replace the CCReg type with RegVal.Gabe Black
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-25cpu: Fix VecElemClass bugs in cpu modelsGiacomo Travaglini
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2019-01-16cpu: dev: sim: gpu-compute: Banish some ISA specific register types.Gabe Black
2018-12-20arch, cpu: Remove float type accessors.Gabe Black
2018-11-16cpu: Fix the usage of const DynInstPtrRekai Gonzalez-Alberquilla
2018-10-01cpu: Fix typo in header guard for Noncaching cpuGiacomo Travaglini
2018-09-12cpu: Replace the fastmem with a new CPU modelAndreas Sandberg
2018-06-14cpu: Prevent suspended TimingSimple CPUs from fetching next instructionsTuan Ta
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-06-11misc: Substitute pointer to Request with aliased RequestPtrGiacomo Travaglini
2018-05-29cpu: Avoid unnecessary dynamic_pointer_cast in atomic modelGiacomo Travaglini
2018-03-06scons: Switch from the print statement to the print function.Gabe Black
2018-01-09cpu, power: Get rid of the remnants of the EA computation insts.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-13arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.Gabe Black