MEM: Removing the default port peer from Python ports

In preparation for the introduction of Master and Slave ports, this
patch removes the default port parameter in the Python port and thus
forces the argument list of the Port to contain only the
description. The drawback at this point is that the config port and
dma port of PCI and DMA devices have to be connected explicitly. This
is key for future diversification as the pio and config port are
slaves, but the dma port is a master.

5 files changed, 17 insertions, 4 deletions

diff --git a/src/dev/Device.py b/src/dev/Device.py
index bf43449b5..aa622aa05 100644
--- a/src/dev/Device.py
+++ b/src/dev/Device.py
@@ -46,7 +46,7 @@ class BasicPioDevice(PioDevice):
 class DmaDevice(PioDevice):
     type = 'DmaDevice'
     abstract = True
-    dma = Port(Self.pio.peerObj.port, "DMA port")
+    dma = Port("DMA port")
     min_backoff_delay = Param.Latency('4ns',
       "min time between a nack packet being received and the next request made by the device")
     max_backoff_delay = Param.Latency('10us',
diff --git a/src/dev/Pci.py b/src/dev/Pci.py
index bd67d82fb..9c2f27142 100644
--- a/src/dev/Pci.py
+++ b/src/dev/Pci.py
@@ -41,7 +41,7 @@ class PciConfigAll(PioDevice):
 class PciDevice(DmaDevice):
     type = 'PciDevice'
     abstract = True
-    config = Port(Self.pio.peerObj.port, "PCI configuration space port")
+    config = Port("PCI configuration space port")
     pci_bus = Param.Int("PCI bus")
     pci_dev = Param.Int("PCI device number")
     pci_func = Param.Int("PCI function code")
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index cd7744362..1dec9a40d 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -199,9 +199,12 @@ class RealViewPBX(RealView):
        self.timer0.pio        = bus.port
        self.timer1.pio        = bus.port
        self.clcd.pio          = bus.port
+       self.clcd.dma          = bus.port
        self.kmi0.pio          = bus.port
        self.kmi1.pio          = bus.port
        self.cf_ctrl.pio       = bus.port
+       self.cf_ctrl.config    = bus.port
+       self.cf_ctrl.dma       = bus.port
        self.dmac_fake.pio     = bus.port
        self.uart1_fake.pio    = bus.port
        self.uart2_fake.pio    = bus.port
@@ -274,6 +277,7 @@ class RealViewEB(RealView):
        self.timer0.pio        = bus.port
        self.timer1.pio        = bus.port
        self.clcd.pio          = bus.port
+       self.clcd.dma          = bus.port
        self.kmi0.pio          = bus.port
        self.kmi1.pio          = bus.port
        self.dmac_fake.pio     = bus.port
@@ -364,13 +368,20 @@ class VExpress_ELT(RealView):
        self.elba_timer0.pio     = bus.port
        self.elba_timer1.pio     = bus.port
        self.clcd.pio            = bus.port
+       self.clcd.dma            = bus.port
        self.kmi0.pio            = bus.port
        self.kmi1.pio            = bus.port
        self.elba_kmi0.pio       = bus.port
        self.elba_kmi1.pio       = bus.port
        self.cf_ctrl.pio         = bus.port
+       self.cf_ctrl.config      = bus.port
+       self.cf_ctrl.dma         = bus.port
        self.ide.pio             = bus.port
+       self.ide.config          = bus.port
+       self.ide.dma             = bus.port
        self.ethernet.pio        = bus.port
+       self.ethernet.config     = bus.port
+       self.ethernet.dma        = bus.port
        self.pciconfig.pio       = bus.default
        bus.use_default_range    = True
 
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index c36ac11ba..534cbb173 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -150,8 +150,8 @@ PciDev::PciDev(const Params *p)
 void
 PciDev::init()
 {
-    if (!configPort)
-        panic("pci config port not connected to anything!");
+    if (!configPort && !configPort->isConnected())
+        panic("PCI config port on %s not connected to anything!\n", name());
    configPort->sendRangeChange();
    PioDevice::init();
 }
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index c23ecf01c..baff35e0b 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -105,6 +105,8 @@ class SouthBridge(SimObject):
         self.cmos.pio = bus.port
         self.dma1.pio = bus.port
         self.ide.pio = bus.port
+        self.ide.config = bus.port
+        self.ide.dma = bus.port
         self.keyboard.pio = bus.port
         self.pic1.pio = bus.port
         self.pic2.pio = bus.port