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AgeCommit message (Expand)Author
2019-01-22arm: dev: Replace ArmISA::MiscReg with RegVal in the GIC v3 model.Gabe Black
2019-01-16cpu: dev: sim: gpu-compute: Banish some ISA specific register types.Gabe Black
2019-01-10dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 supportJairo Balart
2019-01-10dev-arm: Add a GICv3 modelJairo Balart
2019-01-04dev, arm: Warn on PL011 DMA disableJan-Peter Larsson
2019-01-04dev-arm: Added VGIC GICV_IIDR responseAnouk Van Laer
2019-01-04dev-arm: Implement GIC-400 model from GicV2Giacomo Travaglini
2019-01-04dev-arm: Move VGic from Realview.py to Gic.pyGiacomo Travaglini
2019-01-04dev-arm: Added unimplemented GICv2 GICC_DIRAnouk Van Laer
2018-10-17dev: Remove using namespace TheISA in uart8250.cc.Gabe Black
2018-10-17dev: Explicitly specify the endianness for packet accessors.Gabe Black
2018-10-17dev: Build most of the networking devices in the NULL_ISA build.Gabe Black
2018-10-17dev: Build the PCI device models even in NULL_ISA builds.Gabe Black
2018-10-17dev-arm: Don't panic when EOIR a non active PPIAdrien Pesle
2018-10-17dev-arm: Fix Gicv2 distributor group registerAdrien Pesle
2018-10-12alpha: Use little endian packet accessors.Gabe Black
2018-10-12sparc: Use big endian packet accessors.Gabe Black
2018-10-12arm: Use little endian packet accessors.Gabe Black
2018-10-12x86: Use little endian packet accessors.Gabe Black
2018-10-12dev: Include the platform base class even in NULL_ISA builds.Gabe Black
2018-10-08dev, arm: remove the RealViewEB platformCiro Santilli
2018-10-01dev-arm: Enable FIQ signaling for Group0 interrupts in GICv2Giacomo Travaglini
2018-10-01dev-arm: Create postFiq events for GICv2Giacomo Travaglini
2018-10-01dev-arm: Implement GICv2 GICD_IGROUPR registerGiacomo Travaglini
2018-10-01dev-arm: Fix GICv2 cpu interrupt enable flagGiacomo Travaglini
2018-10-01dev-arm: Add basic support for level sensitive SPIs in GICv2Adrien Pesle
2018-09-28dev-arm: Make CpuLocalTimer use standard ArmInterruptPinGiacomo Travaglini
2018-09-28dev-arm: Take into account PPI enable bitGiacomo Travaglini
2018-09-18dev, arm: fix error class-memaccess with GCC >= 8.1Maurice Becker
2018-09-18Pl011: Added registers UART_RSR/UART_ECRMaurice Becker
2018-09-12dev-arm: fix build to missing Pl390 to Gicv2 renameCiro Santilli
2018-09-12config, dev-arm: Fix UART handling baremetal modeCiro Santilli
2018-09-12dev-arm: rename Pl390 to GicV2Ciro Santilli
2018-09-12dev-arm: improve Pl390 parametersCiro Santilli
2018-09-11net: Fix a bug when receiving fragamented packetsPin-Yen Lin
2018-09-10dev-arm: Make GenericTimer use standard ArmInterruptPinGiacomo Travaglini
2018-09-10dev-arm: Factory SimObject for generating ArmInterruptPinGiacomo Travaglini
2018-09-10dev, arm: Add misc reg tracing to the generic timerAndreas Sandberg
2018-09-10dev-arm: Create a getter for ArmInterruptPin ID numberGiacomo Travaglini
2018-09-07net: Fix a bug when handling IPv6 packetsPin-Yen Lin
2018-08-21dev, arm: Fix incorrect GIC address range sizesAndreas Sandberg
2018-08-21misc: Appease GCC 8Jason Lowe-Power
2018-07-17dev, arm: accept and ignore writes to GIC APRn registersCiro Santilli
2018-06-21dev-arm: Use recurseDeviceTree instead of custom in platformAndreas Sandberg
2018-06-15dev-arm: Fix the address range for some I/O devicesNikos Nikoleris
2018-06-14dev-arm: Add new VExpress_GEM5_V1_Base PlatformRohit Kurup
2018-06-14dev-arm: Remove deprecated GIC test interfacesAndreas Sandberg
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-06-07dev-arm: Add a VirtIO MMIO device to VExpress_GEM5_V1Andreas Sandberg
2018-06-07dev-arm: Add a MMIO transport interface for VirtIOAndreas Sandberg
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