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author | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-04-07 09:30:20 -0500 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-04-07 09:30:20 -0500 |
commit | c75ff71139d6358678835cca63e35d1135eaf466 (patch) | |
tree | 0811177db4dca4a237b8e5d7dd65f8ec155cb14e /src/gpu-compute/shader.hh | |
parent | d99deff8ea296fd28b48da08aba577a1e7dfc01b (diff) | |
download | gem5-c75ff71139d6358678835cca63e35d1135eaf466.tar.xz |
mem: Remove threadId from memory request class
In general, the ThreadID parameter is unnecessary in the memory system
as the ContextID is what is used for the purposes of locks/wakeups.
Since we allocate sequential ContextIDs for each thread on MT-enabled
CPUs, ThreadID is unnecessary as the CPUs can identify the requesting
thread through sideband info (SenderState / LSQ entries) or ContextID
offset from the base ContextID for a cpu.
This is a re-spin of 20264eb after the revert (bd1c6789) and includes
some fixes of that commit.
Diffstat (limited to 'src/gpu-compute/shader.hh')
-rw-r--r-- | src/gpu-compute/shader.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gpu-compute/shader.hh b/src/gpu-compute/shader.hh index 91ea8aae0..c1f741d6a 100644 --- a/src/gpu-compute/shader.hh +++ b/src/gpu-compute/shader.hh @@ -205,7 +205,7 @@ class Shader : public SimObject bool dispatch_workgroups(NDRange *ndr); Addr mmap(int length); void functionalTLBAccess(PacketPtr pkt, int cu_id, BaseTLB::Mode mode); - void updateThreadContext(int tid); + void updateContext(int cid); void hostWakeUp(BaseCPU *cpu); }; |