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| author | Gabe Black <gabeblack@google.com> | 2018-01-08 04:41:25 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-01-23 20:14:48 +0000 |
| commit | db8c55dede65e07cb9ea8e95c48badd2ea24462f (patch) | |
| tree | 8b8b4fad738f3ecd3907bb6157517cc0e8a822eb /src/mem/SConscript | |
| parent | 8cb6bb444a6ee0106807d0a22bbc63323b410bf8 (diff) | |
| download | gem5-db8c55dede65e07cb9ea8e95c48badd2ea24462f.tar.xz | |
x86, mem: Rewrite the multilevel page table class.
The new version extracts all the x86 specific aspects of the class,
and builds the interface around a variable collection of template
arguments which are classes that represent the different levels of the
page table. The multilevel page table class is now much more ISA
independent.
Change-Id: Id42e168a78d0e70f80ab2438480cb6e00a3aa636
Reviewed-on: https://gem5-review.googlesource.com/7347
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/mem/SConscript')
| -rw-r--r-- | src/mem/SConscript | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript index 1d3249918..625eb0608 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -73,8 +73,6 @@ if env['TARGET_ISA'] != 'null': Source('fs_translating_port_proxy.cc') Source('se_translating_port_proxy.cc') Source('page_table.cc') -if env['TARGET_ISA'] == 'x86': - Source('multi_level_page_table.cc') if env['HAVE_DRAMSIM']: SimObject('DRAMSim2.py') |