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| author | Korey Sewell <ksewell@umich.edu> | 2009-05-11 19:44:34 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2009-05-11 19:44:34 -0400 |
| commit | a63cc2ff5fbba0e42a7aa39bfce6b6e2310fd52a (patch) | |
| tree | 0952c5678b449ffd8def645fec2b714c4960df9e /src/mem/SConscript | |
| parent | eea2b02b04a3076969dd607aca739b96d94b6155 (diff) | |
| parent | f21e80ec72cf68ad859f18a2886297004ea9f959 (diff) | |
| download | gem5-a63cc2ff5fbba0e42a7aa39bfce6b6e2310fd52a.tar.xz | |
Merge Ruby Stuff
Diffstat (limited to 'src/mem/SConscript')
| -rw-r--r-- | src/mem/SConscript | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/mem/SConscript b/src/mem/SConscript index 0b0017f81..21335a709 100644 --- a/src/mem/SConscript +++ b/src/mem/SConscript @@ -32,8 +32,11 @@ Import('*') SimObject('Bridge.py') SimObject('Bus.py') -SimObject('PhysicalMemory.py') SimObject('MemObject.py') +SimObject('PhysicalMemory.py') + +if env['RUBY']: + SimObject('RubyMemory.py') Source('bridge.cc') Source('bus.cc') @@ -45,6 +48,9 @@ Source('port.cc') Source('tport.cc') Source('mport.cc') +if env['RUBY']: + Source('rubymem.cc') + if env['FULL_SYSTEM']: Source('vport.cc') else: |