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authorJavier Bueno <javier.bueno@metempsy.com>2018-11-09 16:02:04 +0100
committerJavier Bueno Hedo <javier.bueno@metempsy.com>2018-11-14 14:19:05 +0000
commit8590243fef2e4ccaefde3af767496dec44c6eb33 (patch)
tree6cf26aa22f26864a116bfe33ab0069ddb7084906 /src/mem/cache/prefetch/queued.cc
parente8e92a12af8cc499659ad840c84c99e293ff1e96 (diff)
downloadgem5-8590243fef2e4ccaefde3af767496dec44c6eb33.tar.xz
mem-cache: implement a probe-based interface
The HW Prefetcher of a cache can now listen events from their associated CPUs and from its own cache. Change-Id: I28aecd8faf8ed44be94464d84485bd1cea2efae3 Reviewed-on: https://gem5-review.googlesource.com/c/14155 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache/prefetch/queued.cc')
-rw-r--r--src/mem/cache/prefetch/queued.cc4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mem/cache/prefetch/queued.cc b/src/mem/cache/prefetch/queued.cc
index 3c5647ae3..f9a036d45 100644
--- a/src/mem/cache/prefetch/queued.cc
+++ b/src/mem/cache/prefetch/queued.cc
@@ -63,7 +63,7 @@ QueuedPrefetcher::~QueuedPrefetcher()
}
}
-Tick
+void
QueuedPrefetcher::notify(const PacketPtr &pkt)
{
// Verify this access type is observed by prefetcher
@@ -110,8 +110,6 @@ QueuedPrefetcher::notify(const PacketPtr &pkt)
}
}
}
-
- return pfq.empty() ? MaxTick : pfq.front().tick;
}
PacketPtr