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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-05-03 12:14:41 +0100 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-05-31 17:45:23 +0000 |
| commit | 56865ad1154c7c3fde2ae6b7329d0c888390f781 (patch) | |
| tree | 61e8693763072515bc6364b1ea0020ff84603ffa /src/mem/cache/write_queue_entry.cc | |
| parent | 51056cec69a72931a319e7be9370ea63f18e1aa3 (diff) | |
| download | gem5-56865ad1154c7c3fde2ae6b7329d0c888390f781.tar.xz | |
mem-cache: Fix include directives in the cache related classes
Change-Id: I111b0f662897c43974aadb08da1ed85c7542585c
Reviewed-on: https://gem5-review.googlesource.com/10433
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/cache/write_queue_entry.cc')
| -rw-r--r-- | src/mem/cache/write_queue_entry.cc | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mem/cache/write_queue_entry.cc b/src/mem/cache/write_queue_entry.cc index 4aa174b5a..e393731b7 100644 --- a/src/mem/cache/write_queue_entry.cc +++ b/src/mem/cache/write_queue_entry.cc @@ -50,16 +50,13 @@ #include "mem/cache/write_queue_entry.hh" -#include <algorithm> #include <cassert> #include <string> -#include <vector> #include "base/logging.hh" #include "base/types.hh" -#include "debug/Cache.hh" -#include "mem/cache/cache.hh" -#include "sim/core.hh" +#include "mem/cache/base.hh" +#include "mem/request.hh" inline void WriteQueueEntry::TargetList::add(PacketPtr pkt, Tick readyTime, |