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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-02-10 21:43:17 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-02-10 21:43:17 -0600 |
| commit | cb7782f78d337527d8ea3d593645fc67cca54d23 (patch) | |
| tree | ac0602477455b2364a32f788b0e1e6bae1fa999b /src/mem/ruby/system/Sequencer.cc | |
| parent | 253e8edf13c4d7bee6bd13f84fdfa6cf40a0c5c3 (diff) | |
| download | gem5-cb7782f78d337527d8ea3d593645fc67cca54d23.tar.xz | |
ruby: enable multiple clock domains
This patch allows ruby to have multiple clock domains. As I understand
with this patch, controllers can have different frequencies. The entire
network needs to run at a single frequency.
The idea is that with in an object, time is treated in terms of cycles.
But the messages that are passed from one entity to another should contain
the time in Ticks. As of now, this is only true for the message buffers,
but not for the links in the network. As I understand the code, all the
entities in different networks (simple, garnet-fixed, garnet-flexible) should
be clocked at the same frequency.
Another problem is that the directory controller has to operate at the same
frequency as the ruby system. This is because the memory controller does
not make use of the Message Buffer, and instead implements a buffer of its
own. So, it has no idea of the frequency at which the directory controller
is operating and uses ruby system's frequency for scheduling events.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.cc')
| -rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 94ad42d9d..1cdd6d806 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -39,7 +39,6 @@ #include "debug/RubyStats.hh" #include "mem/protocol/PrefetchBit.hh" #include "mem/protocol/RubyAccessMode.hh" -#include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/profiler/Profiler.hh" #include "mem/ruby/slicc_interface/RubyRequest.hh" @@ -657,7 +656,7 @@ Sequencer::issueRequest(PacketPtr pkt, RubyRequestType secondary_type) pc = pkt->req->getPC(); } - RubyRequest *msg = new RubyRequest(curCycle(), pkt->getAddr(), + RubyRequest *msg = new RubyRequest(clockEdge(), pkt->getAddr(), pkt->getPtr<uint8_t>(true), pkt->getSize(), pc, secondary_type, RubyAccessMode_Supervisor, pkt, |