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author | Iru Cai <mytbk920423@gmail.com> | 2019-03-21 10:15:58 +0800 |
---|---|---|
committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-21 10:26:39 +0800 |
commit | 694155e0ef174386a6b178ce35d24e504d15ae42 (patch) | |
tree | 170ce88a256948eb1ce19916fe3dafcd3df2a673 /src | |
parent | cb42ee34adb015a15dda071dda26e8208d29e4ee (diff) | |
download | gem5-is-rebase10-DynInstPtr.tar.xz |
Request::getVaddr()is-rebase10-DynInstPtr
Change-Id: Ife5c04941a9181da30e5cc692dec7cfd53feb71f
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/o3/lsq_unit.hh | 6 | ||||
-rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 5 |
2 files changed, 6 insertions, 5 deletions
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 8a0e3b629..158235db8 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -1030,9 +1030,9 @@ LSQUnit<Impl>::read(const RequestPtr &req, DPRINTF(LSQUnit, "created validation/expose" " request for inst [sn:%lli]" "req=%#x, reqLow=%#x, reqHigh=%#x\n", - load_inst->seqNum, (Addr)(load_inst->postReq), - (Addr)(load_inst->postSreqLow), - (Addr)(load_inst->postSreqHigh)); + load_inst->seqNum, load_inst->postReq->getVaddr(), + load_inst->postSreqLow->getVaddr(), + load_inst->postSreqHigh->getVaddr()); } else { load_inst->setExposeCompleted(); load_inst->needPostFetch(false); diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index dffaab8b5..eac818454 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -1147,8 +1147,9 @@ LSQUnit<Impl>::exposeLoads() DPRINTF(LSQUnit, "Validate/Expose request for inst [sn:%lli]" " PC= %s. req=%#x, reqLow=%#x, reqHigh=%#x\n", load_inst->seqNum, load_inst->pcState(), - (Addr)(load_inst->postReq), - (Addr)(load_inst->postSreqLow), (Addr)(load_inst->postSreqHigh)); + load_inst->postReq->getVaddr(), + load_inst->postSreqLow->getVaddr(), + load_inst->postSreqHigh->getVaddr()); PacketPtr data_pkt = NULL; PacketPtr snd_data_pkt = NULL; |