diff options
author | Nathan Binkert <nate@binkert.org> | 2009-01-24 07:27:22 -0800 |
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committer | Nathan Binkert <nate@binkert.org> | 2009-01-24 07:27:22 -0800 |
commit | 64ed39f61b89675237e145ed4a81b49f353921ed (patch) | |
tree | b1338a651e9b428e0e748c8000840390d0498f16 /src | |
parent | f0fb3ac060234ed5860c8d5bca3e84dbd8d30c36 (diff) | |
download | gem5-64ed39f61b89675237e145ed4a81b49f353921ed.tar.xz |
pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.
It's instantaneous and so it's somewhat bogus, but it's a first step.
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/alpha/isa/decoder.isa | 3 | ||||
-rw-r--r-- | src/sim/pseudo_inst.cc | 9 | ||||
-rw-r--r-- | src/sim/pseudo_inst.hh | 1 |
3 files changed, 13 insertions, 0 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa index f057f00cc..67bc5c7a2 100644 --- a/src/arch/alpha/isa/decoder.isa +++ b/src/arch/alpha/isa/decoder.isa @@ -815,6 +815,9 @@ decode OPCODE default Unknown::unknown() { 0x07: rpns({{ R0 = PseudoInst::rpns(xc->tcBase()); }}, IsNonSpeculative, IsUnverifiable); + 0x09: wakeCPU({{ + PseudoInst::wakeCPU(xc->tcBase(), R16); + }}, IsNonSpeculative, IsUnverifiable); 0x10: deprecated_ivlb({{ warn_once("Obsolete M5 ivlb instruction encountered.\n"); }}); diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc index 130a2f0fe..f1cf2835d 100644 --- a/src/sim/pseudo_inst.cc +++ b/src/sim/pseudo_inst.cc @@ -138,6 +138,15 @@ rpns(ThreadContext *tc) } void +wakeCPU(ThreadContext *tc, uint64_t cpuid) +{ + System *sys = tc->getSystemPtr(); + ThreadContext *other_tc = sys->threadContexts[cpuid]; + if (other_tc->status() == ThreadContext::Suspended) + other_tc->activate(); +} + +void m5exit(ThreadContext *tc, Tick delay) { Tick when = curTick + delay * Clock::Int::ns; diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index 7d013eda7..30996fc3b 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -55,6 +55,7 @@ void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr); #endif uint64_t rpns(ThreadContext *tc); +void wakeCPU(ThreadContext *tc, uint64_t cpuid); void m5exit(ThreadContext *tc, Tick delay); void resetstats(ThreadContext *tc, Tick delay, Tick period); void dumpstats(ThreadContext *tc, Tick delay, Tick period); |