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authorGabe Black <gabeblack@google.com>2019-04-27 20:51:22 -0700
committerGabe Black <gabeblack@google.com>2019-04-30 07:37:51 +0000
commit40cc7cdd53540ded69f055262b087dca54f5b715 (patch)
treeac7c19e9023295b717e92ec330af9febe39ed78b /src
parent0eb763c77f7f33694656984fcdac53bf52c3dacb (diff)
downloadgem5-40cc7cdd53540ded69f055262b087dca54f5b715.tar.xz
cpu: Remove hwrei from the generic interfaces.
This mechanism is specific to Alpha and doesn't belong sprinkled around the CPU's generic mechanisms. Change-Id: I87904d1a08df2b03eb770205e2c4b94db25201a1 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18432 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/arch/alpha/ev5.cc22
-rw-r--r--src/cpu/checker/cpu.hh1
-rw-r--r--src/cpu/exec_context.hh6
-rw-r--r--src/cpu/minor/exec_context.hh10
-rw-r--r--src/cpu/o3/cpu.cc18
-rw-r--r--src/cpu/o3/cpu.hh3
-rw-r--r--src/cpu/o3/dyn_inst.hh2
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh28
-rw-r--r--src/cpu/simple/exec_context.hh6
-rw-r--r--src/cpu/simple_thread.cc5
-rw-r--r--src/cpu/simple_thread.hh2
11 files changed, 0 insertions, 103 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index e3e025e2f..e64523d9c 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -485,28 +485,6 @@ copyIprs(ThreadContext *src, ThreadContext *dest)
using namespace AlphaISA;
-Fault
-SimpleThread::hwrei()
-{
- auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(kernelStats);
- assert(stats || !kernelStats);
-
- PCState pc = pcState();
- if (!(pc.pc() & 0x3))
- return std::make_shared<UnimplementedOpcodeFault>();
-
- pc.npc(readMiscRegNoEffect(IPR_EXC_ADDR));
- pcState(pc);
-
- CPA::cpa()->swAutoBegin(this, pc.npc());
-
- if (stats)
- stats->hwrei();
-
- // FIXME: XXX check for interrupts? XXX
- return NoFault;
-}
-
/**
* Check for special simulator handling of specific PAL calls.
* If return value is false, actual PAL call will be suppressed.
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 96f6cc7d4..acbe94f5d 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -539,7 +539,6 @@ class CheckerCPU : public BaseCPU, public ExecContext
void setStCondFailures(unsigned int sc_failures) override {}
/////////////////////////////////////////////////////
- Fault hwrei() override { return thread->hwrei(); }
bool simPalCheck(int palFunc) override
{ return thread->simPalCheck(palFunc); }
void wakeup(ThreadID tid) override { }
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 58d756c6d..0477f3f65 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -315,12 +315,6 @@ class ExecContext {
*/
/**
- * Somewhat Alpha-specific function that handles returning from an
- * error or interrupt.
- */
- virtual Fault hwrei() = 0;
-
- /**
* Check for special simulator handling of specific PAL calls. If
* return value is false, actual PAL call will be suppressed.
*/
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index 4ac621aea..03f8e09c9 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -365,16 +365,6 @@ class ExecContext : public ::ExecContext
return thread.setMiscReg(reg.index(), val);
}
- Fault
- hwrei() override
- {
-#if THE_ISA == ALPHA_ISA
- return thread.hwrei();
-#else
- return NoFault;
-#endif
- }
-
bool
simPalCheck(int palFunc) override
{
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 70417d51f..ba6e80ff2 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -918,24 +918,6 @@ FullO3CPU<Impl>::removeThread(ThreadID tid)
}
template <class Impl>
-Fault
-FullO3CPU<Impl>::hwrei(ThreadID tid)
-{
-#if THE_ISA == ALPHA_ISA
- // Need to clear the lock flag upon returning from an interrupt.
- this->setMiscRegNoEffect(AlphaISA::MISCREG_LOCKFLAG, false, tid);
-
- auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(
- this->thread[tid]->kernelStats);
- assert(stats);
- stats->hwrei();
-
- // FIXME: XXX check for interrupts? XXX
-#endif
- return NoFault;
-}
-
-template <class Impl>
bool
FullO3CPU<Impl>::simPalCheck(int palFunc, ThreadID tid)
{
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index c2c48535f..bd1479acc 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -385,9 +385,6 @@ class FullO3CPU : public BaseO3CPU
/** Traps to handle given fault. */
void trap(const Fault &fault, ThreadID tid, const StaticInstPtr &inst);
- /** HW return from error interrupt. */
- Fault hwrei(ThreadID tid);
-
bool simPalCheck(int palFunc, ThreadID tid);
/** Check if a change in renaming is needed for vector registers.
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 01886606e..9b6c1fbb8 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -248,8 +248,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
}
}
}
- /** Calls hardware return from error interrupt. */
- Fault hwrei() override;
/** Traps to handle specified fault. */
void trap(const Fault &fault);
bool simPalCheck(int palFunc) override;
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 03437a5ae..5fb597379 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -185,34 +185,6 @@ BaseO3DynInst<Impl>::completeAcc(PacketPtr pkt)
}
template <class Impl>
-Fault
-BaseO3DynInst<Impl>::hwrei()
-{
-#if THE_ISA == ALPHA_ISA
- // Can only do a hwrei when in pal mode.
- if (!(this->instAddr() & 0x3))
- return std::make_shared<AlphaISA::UnimplementedOpcodeFault>();
-
- // Set the next PC based on the value of the EXC_ADDR IPR.
- AlphaISA::PCState pc = this->pcState();
- pc.npc(this->cpu->readMiscRegNoEffect(AlphaISA::IPR_EXC_ADDR,
- this->threadNumber));
- this->pcState(pc);
- if (CPA::available()) {
- ThreadContext *tc = this->cpu->tcBase(this->threadNumber);
- CPA::cpa()->swAutoBegin(tc, this->nextInstAddr());
- }
-
- // Tell CPU to clear any state it needs to if a hwrei is taken.
- this->cpu->hwrei(this->threadNumber);
-#else
-
-#endif
- // FIXME: XXX check for interrupts? XXX
- return NoFault;
-}
-
-template <class Impl>
void
BaseO3DynInst<Impl>::trap(const Fault &fault)
{
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index b49747dd2..938bb784a 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -503,12 +503,6 @@ class SimpleExecContext : public ExecContext {
ThreadContext *tcBase() override { return thread->getTC(); }
/**
- * Somewhat Alpha-specific function that handles returning from an
- * error or interrupt.
- */
- Fault hwrei() override { return thread->hwrei(); }
-
- /**
* Check for special simulator handling of specific PAL calls. If
* return value is false, actual PAL call will be suppressed.
*/
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index 7fee8ddc7..b676b0451 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -216,11 +216,6 @@ SimpleThread::copyArchRegs(ThreadContext *src_tc)
// The following methods are defined in src/arch/alpha/ev5.cc for
// Alpha.
#if THE_ISA != ALPHA_ISA
-Fault
-SimpleThread::hwrei()
-{
- return NoFault;
-}
bool
SimpleThread::simPalCheck(int palFunc)
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 33f0bbd8a..71bce3857 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -181,8 +181,6 @@ class SimpleThread : public ThreadState, public ThreadContext
void dumpFuncProfile() override;
- Fault hwrei();
-
bool simPalCheck(int palFunc);
/*******************************************