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authorAlexandru Dutu <alexandru.dutu@amd.com>2016-09-16 12:30:05 -0400
committerAlexandru Dutu <alexandru.dutu@amd.com>2016-09-16 12:30:05 -0400
commit498d0e63e587f7e852483a192ecd37e7af57f8d7 (patch)
treec3ebb2ce0ea129023258c626fe5a628930946d28 /src
parent791837645002679eb3f7f71469d151c10c533d5c (diff)
downloadgem5-498d0e63e587f7e852483a192ecd37e7af57f8d7.tar.xz
gpu-compute: Adding vector register file debug messages
This patch introduces DPRINTFs for reading and writing to and from the vector register file.
Diffstat (limited to 'src')
-rw-r--r--src/gpu-compute/SConscript4
-rw-r--r--src/gpu-compute/vector_register_file.hh3
2 files changed, 6 insertions, 1 deletions
diff --git a/src/gpu-compute/SConscript b/src/gpu-compute/SConscript
index 2de96df24..88c1cf036 100644
--- a/src/gpu-compute/SConscript
+++ b/src/gpu-compute/SConscript
@@ -89,6 +89,7 @@ DebugFlag('GPUPrefetch')
DebugFlag('GPUReg')
DebugFlag('GPUSync')
DebugFlag('GPUTLB')
+DebugFlag('GPUVRF')
DebugFlag('HSALoader')
DebugFlag('HSAIL')
DebugFlag('HSAILObject')
@@ -96,4 +97,5 @@ DebugFlag('Predictor')
DebugFlag('WavefrontStack')
CompoundFlag('GPUALL', ['GPUCoalescer', 'GPUDisp', 'GPUExec', 'GPUFetch',
- 'GPUMem', 'GPUPort', 'GPUSync', 'GPUTLB', 'HSAIL'])
+ 'GPUMem', 'GPUPort', 'GPUSync', 'GPUTLB', 'HSAIL',
+ 'GPUVRF'])
diff --git a/src/gpu-compute/vector_register_file.hh b/src/gpu-compute/vector_register_file.hh
index 1cb011a1e..360b2fb3c 100644
--- a/src/gpu-compute/vector_register_file.hh
+++ b/src/gpu-compute/vector_register_file.hh
@@ -40,6 +40,7 @@
#include "base/statistics.hh"
#include "base/types.hh"
+#include "debug/GPUVRF.hh"
#include "gpu-compute/vector_register_state.hh"
#include "sim/sim_object.hh"
@@ -71,6 +72,7 @@ class VectorRegisterFile : public SimObject
read(int regIdx, int threadId=0)
{
T p0 = vgprState->read<T>(regIdx, threadId);
+ DPRINTF(GPUVRF, "reading vreg[%d][%d] = %u\n", regIdx, threadId, (uint64_t)p0);
return p0;
}
@@ -80,6 +82,7 @@ class VectorRegisterFile : public SimObject
void
write(int regIdx, T value, int threadId=0)
{
+ DPRINTF(GPUVRF, "writing vreg[%d][%d] = %u\n", regIdx, threadId, (uint64_t)value);
vgprState->write<T>(regIdx, value, threadId);
}