diff options
| author | Brandon Potter <brandon.potter@amd.com> | 2019-05-31 15:02:11 -0400 |
|---|---|---|
| committer | Brandon Potter <Brandon.Potter@amd.com> | 2019-05-31 22:12:35 +0000 |
| commit | 87674842a6aeb2c94bf216a6c798b6db9814e00a (patch) | |
| tree | 4618603a52c2622770ba5c102a40c7589d66cbe7 /src | |
| parent | ea088f5150d03d4481555ecbbfa2afba3a87468a (diff) | |
| download | gem5-87674842a6aeb2c94bf216a6c798b6db9814e00a.tar.xz | |
x86: fix movsd bug on %xmm register
The movsd instruction should zero out half the register, but
does not do it. This changeset adds the necessary microop to
the instruction to cause correct behavior.
Change-Id: I5278da3634c78a97ed0586f687a36c6dc5a34c60
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19068
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py index 81dfc7fee..13e900d25 100644 --- a/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py +++ b/src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py @@ -256,13 +256,13 @@ def macroop MOVSS_P_XMM { }; def macroop MOVSD_XMM_M { - # Zero xmmh + lfpimm xmmh, 0 ldfp xmml, seg, sib, disp, dataSize=8 }; def macroop MOVSD_XMM_P { rdip t7 - # Zero xmmh + lfpimm xmmh, 0 ldfp xmml, seg, riprel, disp, dataSize=8 }; |