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authorAli Saidi <saidi@eecs.umich.edu>2007-03-03 22:45:26 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-03-03 22:45:26 -0500
commita81143f06a1ba32839b26f38ddbad8753f93b9cd (patch)
tree0ca796ed2c3977eaa35c4452e8f0e696796a93a2 /src
parent82874eefca231fa960fbd39a90ed98929915c414 (diff)
downloadgem5-a81143f06a1ba32839b26f38ddbad8753f93b9cd.tar.xz
add a sparc fs regression
src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
Diffstat (limited to 'src')
-rw-r--r--src/dev/sparc/iob.cc5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc
index b8caff7e9..2cff02a99 100644
--- a/src/dev/sparc/iob.cc
+++ b/src/dev/sparc/iob.cc
@@ -263,10 +263,9 @@ Iob::generateIpi(Type type, int cpu_id, int vector)
{
// Only handle interrupts for the moment... Cpu Idle/reset/resume will be
// later
- if (type != 0) {
- warn("Ignoring IntVecDis write\n");
+ if (type != 0)
return;
- }
+
assert(type == 0);
ic->post(cpu_id, SparcISA::IT_INT_VEC, vector);
}