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authorGabe Black <gabeblack@google.com>2019-04-27 21:07:54 -0700
committerGabe Black <gabeblack@google.com>2019-04-30 07:37:51 +0000
commitdc9f1a24b1e75c638d7dafc90eb98667bce55c1d (patch)
tree7e3400a0c1436f8a5dc7595a7e716b52f881dbd0 /src
parente9e3fdc02233adbef6ad9831cee05531f4145dac (diff)
downloadgem5-dc9f1a24b1e75c638d7dafc90eb98667bce55c1d.tar.xz
cpu: alpha: Delete all occurrances of the simPalCheck function.
This is now handled within the ISA description. Change-Id: Ie409bb46d102e59d4eb41408d9196fe235626d32 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18434 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/arch/alpha/ev5.cc32
-rw-r--r--src/cpu/checker/cpu.hh2
-rw-r--r--src/cpu/exec_context.hh13
-rw-r--r--src/cpu/minor/exec_context.hh10
-rw-r--r--src/cpu/o3/cpu.cc27
-rw-r--r--src/cpu/o3/cpu.hh2
-rw-r--r--src/cpu/o3/dyn_inst.hh1
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh10
-rw-r--r--src/cpu/simple/exec_context.hh10
-rw-r--r--src/cpu/simple_thread.cc11
-rw-r--r--src/cpu/simple_thread.hh2
11 files changed, 0 insertions, 120 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index e64523d9c..676d7a713 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -482,35 +482,3 @@ copyIprs(ThreadContext *src, ThreadContext *dest)
}
} // namespace AlphaISA
-
-using namespace AlphaISA;
-
-/**
- * Check for special simulator handling of specific PAL calls.
- * If return value is false, actual PAL call will be suppressed.
- */
-bool
-SimpleThread::simPalCheck(int palFunc)
-{
- auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(kernelStats);
- assert(stats || !kernelStats);
-
- if (stats)
- stats->callpal(palFunc, this);
-
- switch (palFunc) {
- case PAL::halt:
- halt();
- if (--System::numSystemsRunning == 0)
- exitSimLoop("all cpus halted");
- break;
-
- case PAL::bpt:
- case PAL::bugchk:
- if (system->breakpoint())
- return false;
- break;
- }
-
- return true;
-}
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index acbe94f5d..7582e5e59 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -539,8 +539,6 @@ class CheckerCPU : public BaseCPU, public ExecContext
void setStCondFailures(unsigned int sc_failures) override {}
/////////////////////////////////////////////////////
- bool simPalCheck(int palFunc) override
- { return thread->simPalCheck(palFunc); }
void wakeup(ThreadID tid) override { }
// Assume that the normal CPU's call to syscall was successful.
// The checker's state would have already been updated by the syscall.
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 0477f3f65..5909af646 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -311,19 +311,6 @@ class ExecContext {
/**
* @{
- * @name Alpha-Specific Interfaces
- */
-
- /**
- * Check for special simulator handling of specific PAL calls. If
- * return value is false, actual PAL call will be suppressed.
- */
- virtual bool simPalCheck(int palFunc) = 0;
-
- /** @} */
-
- /**
- * @{
* @name ARM-Specific Interfaces
*/
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index 03f8e09c9..55391c3fa 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -365,16 +365,6 @@ class ExecContext : public ::ExecContext
return thread.setMiscReg(reg.index(), val);
}
- bool
- simPalCheck(int palFunc) override
- {
-#if THE_ISA == ALPHA_ISA
- return thread.simPalCheck(palFunc);
-#else
- return false;
-#endif
- }
-
void
syscall(int64_t callnum, Fault *fault) override
{
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index ba6e80ff2..50de81b2a 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -918,33 +918,6 @@ FullO3CPU<Impl>::removeThread(ThreadID tid)
}
template <class Impl>
-bool
-FullO3CPU<Impl>::simPalCheck(int palFunc, ThreadID tid)
-{
-#if THE_ISA == ALPHA_ISA
- auto *stats = dynamic_cast<AlphaISA::Kernel::Statistics *>(
- this->thread[tid]->kernelStats);
- if (stats)
- stats->callpal(palFunc, this->threadContexts[tid]);
-
- switch (palFunc) {
- case PAL::halt:
- halt();
- if (--System::numSystemsRunning == 0)
- exitSimLoop("all cpus halted");
- break;
-
- case PAL::bpt:
- case PAL::bugchk:
- if (this->system->breakpoint())
- return false;
- break;
- }
-#endif
- return true;
-}
-
-template <class Impl>
void
FullO3CPU<Impl>::switchRenameMode(ThreadID tid, UnifiedFreeList* freelist)
{
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index bd1479acc..c754fe8cf 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -385,8 +385,6 @@ class FullO3CPU : public BaseO3CPU
/** Traps to handle given fault. */
void trap(const Fault &fault, ThreadID tid, const StaticInstPtr &inst);
- bool simPalCheck(int palFunc, ThreadID tid);
-
/** Check if a change in renaming is needed for vector registers.
* The vecMode variable is updated and propagated to rename maps.
*
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 9b6c1fbb8..131ffd258 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -250,7 +250,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
}
/** Traps to handle specified fault. */
void trap(const Fault &fault);
- bool simPalCheck(int palFunc) override;
/** Emulates a syscall. */
void syscall(int64_t callnum, Fault *fault) override;
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 5fb597379..fbeb3c291 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -192,16 +192,6 @@ BaseO3DynInst<Impl>::trap(const Fault &fault)
}
template <class Impl>
-bool
-BaseO3DynInst<Impl>::simPalCheck(int palFunc)
-{
-#if THE_ISA != ALPHA_ISA
- panic("simPalCheck called, but PAL only exists in Alpha!\n");
-#endif
- return this->cpu->simPalCheck(palFunc, this->threadNumber);
-}
-
-template <class Impl>
void
BaseO3DynInst<Impl>::syscall(int64_t callnum, Fault *fault)
{
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 938bb784a..fb4ced381 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -502,16 +502,6 @@ class SimpleExecContext : public ExecContext {
/** Returns a pointer to the ThreadContext. */
ThreadContext *tcBase() override { return thread->getTC(); }
- /**
- * Check for special simulator handling of specific PAL calls. If
- * return value is false, actual PAL call will be suppressed.
- */
- bool
- simPalCheck(int palFunc) override
- {
- return thread->simPalCheck(palFunc);
- }
-
bool
readPredicate() const override
{
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index b676b0451..9067e877b 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -212,14 +212,3 @@ SimpleThread::copyArchRegs(ThreadContext *src_tc)
{
TheISA::copyRegs(src_tc, this);
}
-
-// The following methods are defined in src/arch/alpha/ev5.cc for
-// Alpha.
-#if THE_ISA != ALPHA_ISA
-
-bool
-SimpleThread::simPalCheck(int palFunc)
-{
- return true;
-}
-#endif
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 71bce3857..733047f71 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -181,8 +181,6 @@ class SimpleThread : public ThreadState, public ThreadContext
void dumpFuncProfile() override;
- bool simPalCheck(int palFunc);
-
/*******************************************
* ThreadContext interface functions.
******************************************/