diff options
| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-01-18 16:30:06 -0600 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-01-18 16:30:06 -0600 |
| commit | f7885b8f260ca11c2f4a405525d9fc4e554f41a8 (patch) | |
| tree | 7843d9030dd422473d7efd5a4e2a0fd787e2b7f8 /tests/long/40.perlbmk/ref/arm/linux/o3-timing/simerr | |
| parent | 9b67f3723e48efdd0a0b640ff82cfcf8aad3a659 (diff) | |
| download | gem5-f7885b8f260ca11c2f4a405525d9fc4e554f41a8.tar.xz | |
ARM/O3: Add regressions for ARM w/ O3 CPU.
Diffstat (limited to 'tests/long/40.perlbmk/ref/arm/linux/o3-timing/simerr')
| -rwxr-xr-x | tests/long/40.perlbmk/ref/arm/linux/o3-timing/simerr | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simerr b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simerr new file mode 100755 index 000000000..75c1cafaa --- /dev/null +++ b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simerr @@ -0,0 +1,7 @@ +warn: Sockets disabled, not accepting gdb connections +For more information see: http://www.m5sim.org/warn/d946bea6 +warn: fcntl64(3, 2) passed through to host +For more information see: http://www.m5sim.org/warn/a55e2c46 +warn: Bad interworking branch address 0x66. +For more information see: http://www.m5sim.org/warn/55f199fd +hack: be nice to actually delete the event here |