diff options
39 files changed, 183 insertions, 181 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index 84b3d5840..d68c99b2c 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -83,7 +83,7 @@ AlphaTlb::lookup(Addr vpn, uint8_t asn) const void -AlphaTlb::checkCacheability(MemReqPtr req) +AlphaTlb::checkCacheability(MemReqPtr &req) { // in Alpha, cacheability is controlled by upper-level bits of the // physical address @@ -268,7 +268,7 @@ AlphaItb::fault(Addr pc, ExecContext *xc) const Fault -AlphaItb::translate(MemReqPtr req) const +AlphaItb::translate(MemReqPtr &req) const { InternalProcReg *ipr = req->xc->regs.ipr; @@ -433,7 +433,7 @@ AlphaDtb::fault(Addr vaddr, uint64_t flags, ExecContext *xc) const } Fault -AlphaDtb::translate(MemReqPtr req, bool write) const +AlphaDtb::translate(MemReqPtr &req, bool write) const { RegFile *regs = &req->xc->regs; Addr pc = regs->pc; diff --git a/arch/alpha/alpha_memory.hh b/arch/alpha/alpha_memory.hh index bfcd313e2..482a13eee 100644 --- a/arch/alpha/alpha_memory.hh +++ b/arch/alpha/alpha_memory.hh @@ -70,7 +70,7 @@ class AlphaTlb : public SimObject return (unimplBits == 0) || (unimplBits == VA_UNIMPL_MASK); } - static void checkCacheability(MemReqPtr req); + static void checkCacheability(MemReqPtr &req); // Checkpointing virtual void serialize(std::ostream &os); @@ -92,7 +92,7 @@ class AlphaItb : public AlphaTlb AlphaItb(const std::string &name, int size); virtual void regStats(); - Fault translate(MemReqPtr req) const; + Fault translate(MemReqPtr &req) const; }; class AlphaDtb : public AlphaTlb @@ -118,7 +118,7 @@ class AlphaDtb : public AlphaTlb AlphaDtb(const std::string &name, int size); virtual void regStats(); - Fault translate(MemReqPtr req, bool write) const; + Fault translate(MemReqPtr &req, bool write) const; }; #endif // __ALPHA_MEMORY_HH__ diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 3533da09f..51bce65c2 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1287,6 +1287,13 @@ declare {{ { } + Addr branchTarget(ExecContext *xc) + { + Addr NPC = xc->readPC() + 4; + uint64_t Rb = xc->readIntReg(_srcRegIdx[0]); + return (Rb & ~3) | (NPC & 1); + } + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) { std::stringstream ss; diff --git a/base/cprintf_formats.hh b/base/cprintf_formats.hh index b921c0506..c3e01c935 100644 --- a/base/cprintf_formats.hh +++ b/base/cprintf_formats.hh @@ -62,7 +62,7 @@ struct Format template <typename T> inline void -_format_char(std::ostream &out, const T& data, Format &fmt) +_format_char(std::ostream &out, const T &data, Format &fmt) { using namespace std; @@ -71,7 +71,7 @@ _format_char(std::ostream &out, const T& data, Format &fmt) template <typename T> inline void -_format_integer(std::ostream &out, const T& data, Format &fmt) +_format_integer(std::ostream &out, const T &data, Format &fmt) { using namespace std; @@ -128,7 +128,7 @@ _format_integer(std::ostream &out, const T& data, Format &fmt) template <typename T> inline void -_format_float(std::ostream &out, const T& data, Format &fmt) +_format_float(std::ostream &out, const T &data, Format &fmt) { using namespace std; @@ -180,7 +180,7 @@ _format_float(std::ostream &out, const T& data, Format &fmt) template <typename T> inline void -_format_string(std::ostream &out, const T& data, Format &fmt) +_format_string(std::ostream &out, const T &data, Format &fmt) { using namespace std; @@ -225,7 +225,7 @@ _format_string(std::ostream &out, const T& data, Format &fmt) // template <typename T> inline void -format_char(std::ostream &out, const T& data, Format &fmt) +format_char(std::ostream &out, const T &data, Format &fmt) { out << "<bad arg type for char format>"; } inline void @@ -321,7 +321,7 @@ format_integer(std::ostream &out, unsigned long long data, Format &fmt) // template <typename T> inline void -format_float(std::ostream &out, const T& data, Format &fmt) +format_float(std::ostream &out, const T &data, Format &fmt) { out << "<bad arg type for float format>"; } inline void @@ -337,7 +337,7 @@ format_float(std::ostream &out, double data, Format &fmt) // template <typename T> inline void -format_string(std::ostream &out, const T& data, Format &fmt) +format_string(std::ostream &out, const T &data, Format &fmt) { _format_string(out, data, fmt); } inline void diff --git a/base/kgdb.h b/base/kgdb.h index 35f74f4ba..a358dfa16 100644 --- a/base/kgdb.h +++ b/base/kgdb.h @@ -172,32 +172,4 @@ #define ALPHA_KENTRY_UNA 4 #define ALPHA_KENTRY_SYS 5 -/* - * MMCSR Fault Type Codes. [OSF/1 PALcode Specific] - */ - -#define ALPHA_MMCSR_INVALTRANS 0 -#define ALPHA_MMCSR_ACCESS 1 -#define ALPHA_MMCSR_FOR 2 -#define ALPHA_MMCSR_FOE 3 -#define ALPHA_MMCSR_FOW 4 - -/* - * Instruction Fault Type Codes. [OSF/1 PALcode Specific] - */ - -#define ALPHA_IF_CODE_BPT 0 -#define ALPHA_IF_CODE_BUGCHK 1 -#define ALPHA_IF_CODE_GENTRAP 2 -#define ALPHA_IF_CODE_FEN 3 -#define ALPHA_IF_CODE_OPDEC 4 - -#define BKPT_INST 0x00000080 // breakpoint instruction -#define BKPT_SIZE (4) // size of breakpoint inst - -#define IS_BREAKPOINT_TRAP(type, code) ((type) == ALPHA_KENTRY_IF && \ - (code) == ALPHA_IF_CODE_BPT) -#define IS_WATCHPOINT_TRAP(type, code) 0 - - #endif /* __KGDB_H__ */ diff --git a/base/range.hh b/base/range.hh index 0d3383b01..3443bf246 100644 --- a/base/range.hh +++ b/base/range.hh @@ -49,7 +49,7 @@ class Range Range(const Range &r) { operator=(r); } - Range(const T& s, const T& e) + Range(const T &s, const T &e) : start(s), end(e) { valid = (start <= end); diff --git a/base/refcnt.hh b/base/refcnt.hh index 5bc62ae23..f3e0e4114 100644 --- a/base/refcnt.hh +++ b/base/refcnt.hh @@ -64,7 +64,7 @@ class RefCountingPtr public: RefCountingPtr() : data(NULL) {} RefCountingPtr(T *data) { copy(data); } - RefCountingPtr(const RefCountingPtr& r) { copy(r.data); } + RefCountingPtr(const RefCountingPtr &r) { copy(r.data); } ~RefCountingPtr() { del(); } T *operator->() { return data; } @@ -83,7 +83,7 @@ class RefCountingPtr return *this; } - RefCountingPtr &operator=(const RefCountingPtr& r) { + RefCountingPtr &operator=(const RefCountingPtr &r) { if (data != r.data) { del(); copy(r.data); diff --git a/base/remote_gdb.cc b/base/remote_gdb.cc index 35a90073a..e701b5a01 100644 --- a/base/remote_gdb.cc +++ b/base/remote_gdb.cc @@ -171,11 +171,17 @@ GDBListener::~GDBListener() delete event; } +string +GDBListener::name() +{ + return gdb->name() + ".listener"; +} + void GDBListener::listen() { while (!listener.listen(port, true)) { - DPRINTF(RGDB, "GDBListener(listen): Can't bind port %d\n", port); + DPRINTF(GDBMisc, "Can't bind port %d\n", port); port++; } @@ -188,7 +194,7 @@ void GDBListener::accept() { if (!listener.islistening()) - panic("GDBListener(accept): cannot accept a connection if we're not listening!"); + panic("GDBListener::accept(): cannot accept if we're not listening!"); int sfd = listener.accept(true); @@ -216,7 +222,12 @@ RemoteGDB::Event::Event(RemoteGDB *g, int fd, int e) void RemoteGDB::Event::process(int revent) -{ gdb->trap(ALPHA_KENTRY_IF); } +{ + if (revent & POLLIN) + gdb->trap(ALPHA_KENTRY_IF); + else if (revent & POLLNVAL) + gdb->detach(); +} RemoteGDB::RemoteGDB(System *_system, ExecContext *c) : event(NULL), fd(-1), active(false), attached(false), @@ -231,6 +242,12 @@ RemoteGDB::~RemoteGDB() delete event; } +string +RemoteGDB::name() +{ + return system->name() + ".remote_gdb"; +} + bool RemoteGDB::isattached() { return attached; } @@ -316,17 +333,17 @@ RemoteGDB::acc(Addr va, size_t len) do { if (va < ALPHA_K0SEG_BASE) { - DPRINTF(RGDB, "RGDB(acc): Mapping is invalid %#x < K0SEG\n", va); + DPRINTF(GDBAcc, "acc: Mapping is invalid %#x < K0SEG\n", va); return false; } if (va < ALPHA_K1SEG_BASE) { if (va < (ALPHA_K0SEG_BASE + pmem->getSize())) { - DPRINTF(RGDB, "RGDB(acc): Mapping is valid K0SEG <= " + DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= " "%#x < K0SEG + size\n", va); return true; } else { - DPRINTF(RGDB, "RGDB(acc): Mapping is invalid %#x < K0SEG\n", + DPRINTF(GDBAcc, "acc: Mapping is invalid %#x < K0SEG\n", va); return false; } @@ -335,13 +352,13 @@ RemoteGDB::acc(Addr va, size_t len) Addr ptbr = context->regs.ipr[AlphaISA::IPR_PALtemp20]; pte = kernel_pte_lookup(pmem, ptbr, va); if (!pte || !entry_valid(pmem->phys_read_qword(pte))) { - DPRINTF(RGDB, "RGDB(acc): %#x pte is invalid\n", va); + DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va); return false; } va += ALPHA_PGBYTES; } while (va < last_va); - DPRINTF(RGDB, "RGDB(acc): %#x mapping is valid\n", va); + DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); return true; } @@ -355,6 +372,9 @@ int RemoteGDB::signal(int type) { switch (type) { + case ALPHA_KENTRY_INT: + return (SIGTRAP); + case ALPHA_KENTRY_UNA: return (SIGBUS); @@ -399,7 +419,8 @@ RemoteGDB::getregs() void RemoteGDB::setregs() { - memcpy(context->regs.intRegFile, &gdbregs[KGDB_REG_V0], 32 * sizeof(uint64_t)); + memcpy(context->regs.intRegFile, &gdbregs[KGDB_REG_V0], + 32 * sizeof(uint64_t)); #ifdef KGDB_FP_REGS memcpy(context->regs.floatRegFile.q, &gdbregs[KGDB_REG_F0], 32 * sizeof(uint64_t)); @@ -410,7 +431,7 @@ RemoteGDB::setregs() void RemoteGDB::setTempBreakpoint(TempBreakpoint &bkpt, Addr addr) { - DPRINTF(RGDB, "RGDB(setTempBreakpoint): addr=%#x\n", addr); + DPRINTF(GDBMisc, "setTempBreakpoint: addr=%#x\n", addr); bkpt.address = addr; insertHardBreak(addr, 4); @@ -419,7 +440,7 @@ RemoteGDB::setTempBreakpoint(TempBreakpoint &bkpt, Addr addr) void RemoteGDB::clearTempBreakpoint(TempBreakpoint &bkpt) { - DPRINTF(RGDB, "RGDB(setTempBreakpoint): addr=%#x\n", + DPRINTF(GDBMisc, "setTempBreakpoint: addr=%#x\n", bkpt.address); @@ -430,7 +451,7 @@ RemoteGDB::clearTempBreakpoint(TempBreakpoint &bkpt) void RemoteGDB::clearSingleStep() { - DPRINTF(RGDB, "clearSingleStep bt_addr=%#x nt_addr=%#x\n", + DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n", takenBkpt.address, notTakenBkpt.address); if (takenBkpt.address != 0) @@ -460,7 +481,7 @@ RemoteGDB::setSingleStep() set_bt = true; } - DPRINTF(RGDB, "setSingleStep bt_addr=%#x nt_addr=%#x\n", + DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n", takenBkpt.address, notTakenBkpt.address); setTempBreakpoint(notTakenBkpt, npc); @@ -494,7 +515,7 @@ RemoteGDB::send(const char *bp) const char *p; uint8_t csum, c; -// DPRINTF(RGDB, "RGDB(send): %s\n", bp); + DPRINTF(GDBSend, "send: %s\n", bp); do { p = bp; @@ -554,7 +575,7 @@ RemoteGDB::recv(char *bp, int maxlen) putbyte(KGDB_BADP); } while (1); -// DPRINTF(RGDB, "RGDB(recv): %s: %s\n", gdb_command(*bp), bp); + DPRINTF(GDBRecv, "recv: %s: %s\n", gdb_command(*bp), bp); return (len); } @@ -569,11 +590,11 @@ RemoteGDB::read(Addr vaddr, size_t size, char *data) uint8_t *maddr; if (vaddr < 10) { - DPRINTF(RGDB, "\nRGDB(read): reading memory location zero!\n"); + DPRINTF(GDBRead, "read: reading memory location zero!\n"); vaddr = lastaddr + lastsize; } - DPRINTF(RGDB, "RGDB(read): addr=%#x, size=%d", vaddr, size); + DPRINTF(GDBRead, "read: addr=%#x, size=%d", vaddr, size); #if TRACING_ON char *d = data; size_t s = size; @@ -607,10 +628,13 @@ RemoteGDB::read(Addr vaddr, size_t size, char *data) } #if TRACING_ON - if (DTRACE(RGDB)) { - char buf[1024]; - mem2hex(buf, d, s); - cprintf(": %s\n", buf); + if (DTRACE(GDBRead)) { + if (DTRACE(GDBExtra)) { + char buf[1024]; + mem2hex(buf, d, s); + DPRINTFNR(": %s\n", buf); + } else + DPRINTFNR("\n"); } #endif @@ -627,14 +651,18 @@ RemoteGDB::write(Addr vaddr, size_t size, const char *data) uint8_t *maddr; if (vaddr < 10) { - DPRINTF(RGDB, "RGDB(write): writing memory location zero!\n"); + DPRINTF(GDBWrite, "write: writing memory location zero!\n"); vaddr = lastaddr + lastsize; } - if (DTRACE(RGDB)) { - char buf[1024]; - mem2hex(buf, data, size); - cprintf("RGDB(write): addr=%#x, size=%d: %s\n", vaddr, size, buf); + if (DTRACE(GDBWrite)) { + DPRINTFN("write: addr=%#x, size=%d", vaddr, size); + if (DTRACE(GDBExtra)) { + char buf[1024]; + mem2hex(buf, data, size); + DPRINTFNR(": %s\n", buf); + } else + DPRINTFNR("\n"); } lastaddr = vaddr; @@ -682,17 +710,17 @@ RemoteGDB::HardBreakpoint::HardBreakpoint(RemoteGDB *_gdb, Addr pc) : PCEvent(_gdb->getPcEventQueue(), "HardBreakpoint Event", pc), gdb(_gdb), refcount(0) { - DPRINTF(RGDB, "creating hardware breakpoint at %#x\n", evpc); + DPRINTF(GDBMisc, "creating hardware breakpoint at %#x\n", evpc); schedule(); } void RemoteGDB::HardBreakpoint::process(ExecContext *xc) { - DPRINTF(RGDB, "handling hardware breakpoint at %#x\n", pc()); + DPRINTF(GDBMisc, "handling hardware breakpoint at %#x\n", pc()); if (xc == gdb->context) - gdb->trap(ALPHA_KENTRY_IF); + gdb->trap(ALPHA_KENTRY_INT); } bool @@ -719,7 +747,7 @@ RemoteGDB::insertHardBreak(Addr addr, size_t len) if (len != sizeof(MachInst)) panic("invalid length\n"); - DPRINTF(RGDB, "inserting hardware breakpoint at %#x\n", addr); + DPRINTF(GDBMisc, "inserting hardware breakpoint at %#x\n", addr); HardBreakpoint *&bkpt = hardBreakMap[addr]; if (bkpt == 0) @@ -728,19 +756,6 @@ RemoteGDB::insertHardBreak(Addr addr, size_t len) bkpt->refcount++; return true; - -#if 0 - break_iter_t i = hardBreakMap.find(addr); - if (i == hardBreakMap.end()) { - HardBreakpoint *bkpt = new HardBreakpoint(this, addr); - hardBreakMap[addr] = bkpt; - i = hardBreakMap.insert(make_pair(addr, bkpt)); - if (i == hardBreakMap.end()) - return false; - } - - (*i).second->refcount++; -#endif } bool @@ -749,7 +764,7 @@ RemoteGDB::removeHardBreak(Addr addr, size_t len) if (len != sizeof(MachInst)) panic("invalid length\n"); - DPRINTF(RGDB, "removing hardware breakpoint at %#x\n", addr); + DPRINTF(GDBMisc, "removing hardware breakpoint at %#x\n", addr); break_iter_t i = hardBreakMap.find(addr); if (i == hardBreakMap.end()) @@ -798,7 +813,7 @@ RemoteGDB::trap(int type) if (!attached) return false; - DPRINTF(RGDB, "RGDB(trap): PC=%#x NPC=%#x\n", + DPRINTF(GDBMisc, "trap: PC=%#x NPC=%#x\n", context->regs.pc, context->regs.npc); clearSingleStep(); @@ -813,17 +828,12 @@ RemoteGDB::trap(int type) * After the debugger is "active" (connected) it will be * waiting for a "signaled" message from us. */ - if (!active) { - if (!IS_BREAKPOINT_TRAP(type, 0)) { - // No debugger active -- let trap handle this. - return false; - } + if (!active) active = true; - } else { + else // Tell remote host that an exception has occurred. sprintf((char *)buffer, "S%02x", signal(type)); send(buffer); - } // Stick frame regs into our reg cache. getregs(); @@ -1000,7 +1010,7 @@ RemoteGDB::trap(int type) if (*p++ != ',') send("E0D"); len = hex2i(&p); - DPRINTF(RGDB, "kgdb: clear %s, addr=%#x, len=%d\n", + DPRINTF(GDBMisc, "clear %s, addr=%#x, len=%d\n", break_type(subcmd), val, len); ret = false; @@ -1032,7 +1042,7 @@ RemoteGDB::trap(int type) if (*p++ != ',') send("E0D"); len = hex2i(&p); - DPRINTF(RGDB, "kgdb: set %s, addr=%#x, len=%d\n", + DPRINTF(GDBMisc, "set %s, addr=%#x, len=%d\n", break_type(subcmd), val, len); ret = false; @@ -1077,15 +1087,15 @@ RemoteGDB::trap(int type) case KGDB_TARGET_EXIT: case KGDB_BINARY_DLOAD: // Unsupported command - DPRINTF(RGDB, "kgdb: Unsupported command: %s\n", + DPRINTF(GDBMisc, "Unsupported command: %s\n", gdb_command(command)); - DDUMP(RGDB, (uint8_t *)data, datalen); + DDUMP(GDBMisc, (uint8_t *)data, datalen); send(""); continue; default: // Unknown command. - DPRINTF(RGDB, "kgdb: Unknown command: %c(%#x)\n", + DPRINTF(GDBMisc, "Unknown command: %c(%#x)\n", command, command); send(""); continue; diff --git a/base/remote_gdb.hh b/base/remote_gdb.hh index 62fd52856..fcc1ee2a9 100644 --- a/base/remote_gdb.hh +++ b/base/remote_gdb.hh @@ -116,9 +116,12 @@ class RemoteGDB RemoteGDB *gdb; public: + int refcount; + + public: HardBreakpoint(RemoteGDB *_gdb, Addr addr); + std::string name() { return gdb->name() + ".hwbkpt"; } - int refcount; virtual void process(ExecContext *xc); }; friend class HardBreakpoint; @@ -145,6 +148,9 @@ class RemoteGDB void clearTempBreakpoint(TempBreakpoint &bkpt); void setTempBreakpoint(TempBreakpoint &bkpt, Addr addr); + + public: + std::string name(); }; template <class T> @@ -188,6 +194,7 @@ class GDBListener void accept(); void listen(); + std::string name(); }; #endif /* __REMOTE_GDB_H__ */ diff --git a/base/res_list.hh b/base/res_list.hh index c856c1226..04c3b7cfa 100644 --- a/base/res_list.hh +++ b/base/res_list.hh @@ -103,7 +103,7 @@ class res_list : public res_list_base iterator prev(void) { return iterator(p->prev); } bool operator== (iterator x) { return (x.p == this->p); } bool operator != (iterator x) { return (x.p != this->p); } - T& operator * (void) { return *(p->data); } + T &operator * (void) { return *(p->data); } T* operator -> (void) { return p->data; } bool isnull(void) { return (p==0); } bool notnull(void) { return (p!=0); } diff --git a/base/statistics.hh b/base/statistics.hh index ce20043a3..d8b78fbff 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -838,7 +838,7 @@ class ScalarBase : public DataAccess * @param v The new value. */ template <typename U> - void operator=(const U& v) { data()->set(v, params); } + void operator=(const U &v) { data()->set(v, params); } /** * Increment the stat by the given value. This calls the associated @@ -846,7 +846,7 @@ class ScalarBase : public DataAccess * @param v The value to add. */ template <typename U> - void operator+=(const U& v) { data()->inc(v, params); } + void operator+=(const U &v) { data()->inc(v, params); } /** * Decrement the stat by the given value. This calls the associated @@ -854,7 +854,7 @@ class ScalarBase : public DataAccess * @param v The value to substract. */ template <typename U> - void operator-=(const U& v) { data()->dec(v, params); } + void operator-=(const U &v) { data()->dec(v, params); } /** * Return the number of elements, always 1 for a scalar. @@ -1105,7 +1105,7 @@ class ScalarProxy * @param v The new value. */ template <typename U> - void operator=(const U& v) { data()->set(v, *params); } + void operator=(const U &v) { data()->set(v, *params); } /** * Increment the stat by the given value. This calls the associated @@ -1113,7 +1113,7 @@ class ScalarProxy * @param v The value to add. */ template <typename U> - void operator+=(const U& v) { data()->inc(v, *params); } + void operator+=(const U &v) { data()->inc(v, *params); } /** * Decrement the stat by the given value. This calls the associated @@ -1121,7 +1121,7 @@ class ScalarProxy * @param v The value to substract. */ template <typename U> - void operator-=(const U& v) { data()->dec(v, *params); } + void operator-=(const U &v) { data()->dec(v, *params); } /** * Return the number of elements, always 1 for a scalar. @@ -1574,7 +1574,7 @@ struct AvgFancy * @param number The number of times to add the value. * @param p The paramters of the distribution. */ - void sample(T val, int number, const Params& p) + void sample(T val, int number, const Params &p) { T value = val * number; sum += value; @@ -1663,7 +1663,7 @@ class DistBase : public DataAccess * @param n The number of times to add it, defaults to 1. */ template <typename U> - void sample(const U& v, int n = 1) { data()->sample(v, n, params); } + void sample(const U &v, int n = 1) { data()->sample(v, n, params); } /** * Return the number of entries in this stat. @@ -1787,7 +1787,7 @@ class DistProxy public: template <typename U> - void sample(const U& v, int n = 1) { data()->sample(v, n, cstat->params); } + void sample(const U &v, int n = 1) { data()->sample(v, n, cstat->params); } size_t size() const { return 1; } bool zero() const { return data()->zero(cstat->params); } @@ -2067,7 +2067,7 @@ class UnaryNode : public Node mutable rvec_t result; public: - UnaryNode(NodePtr p) : l(p) {} + UnaryNode(NodePtr &p) : l(p) {} const rvec_t &val() const { const rvec_t &lvec = l->val(); @@ -2110,7 +2110,7 @@ class BinaryNode : public Node mutable rvec_t result; public: - BinaryNode(NodePtr a, NodePtr b) : l(a), r(b) {} + BinaryNode(NodePtr &a, NodePtr &b) : l(a), r(b) {} const rvec_t &val() const { Op op; @@ -2179,7 +2179,7 @@ class SumNode : public Node mutable rvec_t result; public: - SumNode(NodePtr p) : l(p), result(1) {} + SumNode(NodePtr &p) : l(p), result(1) {} const rvec_t &val() const { const rvec_t &lvec = l->val(); @@ -2534,7 +2534,7 @@ class Scalar * @param v The new value. */ template <typename U> - void operator=(const U& v) { Base::operator=(v); } + void operator=(const U &v) { Base::operator=(v); } }; /** @@ -2562,7 +2562,7 @@ class Average * @param v The new value. */ template <typename U> - void operator=(const U& v) { Base::operator=(v); } + void operator=(const U &v) { Base::operator=(v); } }; /** @@ -2999,7 +2999,7 @@ class Temp * Return the node pointer. * @return the node pointer. */ - operator NodePtr() { return node;} + operator NodePtr&() { return node;} public: /** diff --git a/base/str.hh b/base/str.hh index 6c3453b8b..8fee21a10 100644 --- a/base/str.hh +++ b/base/str.hh @@ -99,7 +99,7 @@ to_number(const std::string &value, T &retval); template <class T> inline std::string -to_string(const T& value) +to_string(const T &value) { std::stringstream str; str << value; diff --git a/base/trace.hh b/base/trace.hh index 5aeaac445..9e5952765 100644 --- a/base/trace.hh +++ b/base/trace.hh @@ -179,9 +179,8 @@ std::ostream &DebugOut(); #define DDUMP(x, data, count) \ do { \ - using namespace Trace; \ if (Trace::IsOn(Trace::x)) \ - rawDump(data, count); \ + Trace::rawDump(data, count); \ } while (0) #define __dprintf(cycle, name, format, args...) \ @@ -204,6 +203,11 @@ do { \ __dprintf(curTick, name(), args, cp::ArgListNull()); \ } while (0) +#define DPRINTFNR(args...) \ +do { \ + __dprintf((Tick)-1, string(), args, cp::ArgListNull()); \ +} while (0) + #else // !TRACING_ON #define DTRACE(x) (false) @@ -211,6 +215,7 @@ do { \ #define DPRINTF(x, args...) do {} while (0) #define DPRINTFR(args...) do {} while (0) #define DPRINTFN(args...) do {} while (0) +#define DPRINTFNR(args...) do {} while (0) #define DDUMP(x, data, count) do {} while (0) #endif // TRACING_ON diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 74d2ceada..604ee335d 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -71,16 +71,16 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, maxThreadsPerCPU = number_of_threads; // allocate per-thread instruction-based event queues - comInsnEventQueue = new (EventQueue *)[number_of_threads]; + comInstEventQueue = new (EventQueue *)[number_of_threads]; for (int i = 0; i < number_of_threads; ++i) - comInsnEventQueue[i] = new EventQueue("instruction-based event queue"); + comInstEventQueue[i] = new EventQueue("instruction-based event queue"); // // set up instruction-count-based termination events, if any // if (max_insts_any_thread != 0) for (int i = 0; i < number_of_threads; ++i) - new SimExitEvent(comInsnEventQueue[i], max_insts_any_thread, + new SimExitEvent(comInstEventQueue[i], max_insts_any_thread, "a thread reached the max instruction count"); if (max_insts_all_threads != 0) { @@ -90,7 +90,7 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, int *counter = new int; *counter = number_of_threads; for (int i = 0; i < number_of_threads; ++i) - new CountedExitEvent(comInsnEventQueue[i], + new CountedExitEvent(comInstEventQueue[i], "all threads reached the max instruction count", max_insts_all_threads, *counter); } diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh index af1f34b67..648035732 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base_cpu.hh @@ -128,7 +128,7 @@ class BaseCPU : public SimObject * scheduling events based on number of instructions committed by * a particular thread. */ - EventQueue **comInsnEventQueue; + EventQueue **comInstEventQueue; /** * Vector of per-thread load-based event queues. Used for diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 23ae7eda8..6a5f463cd 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -51,7 +51,7 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys, #ifdef FS_MEASURE swCtx(NULL), #endif - func_exe_insn(0), storeCondFailures(0) + func_exe_inst(0), storeCondFailures(0) { memset(®s, 0, sizeof(RegFile)); } @@ -61,14 +61,14 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, : _status(ExecContext::Unallocated), cpu(_cpu), thread_num(_thread_num), cpu_id(-1), process(_process), mem(process->getMemory()), asid(_asid), - func_exe_insn(0), storeCondFailures(0) + func_exe_inst(0), storeCondFailures(0) { } ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, FunctionalMemory *_mem, int _asid) : cpu(_cpu), thread_num(_thread_num), process(0), mem(_mem), asid(_asid), - func_exe_insn(0), storeCondFailures(0) + func_exe_inst(0), storeCondFailures(0) { } #endif @@ -92,7 +92,7 @@ ExecContext::takeOverFrom(ExecContext *oldContext) #endif regs = oldContext->regs; cpu_id = oldContext->cpu_id; - func_exe_insn = oldContext->func_exe_insn; + func_exe_inst = oldContext->func_exe_inst; storeCondFailures = 0; @@ -106,7 +106,7 @@ ExecContext::serialize(ostream &os) SERIALIZE_ENUM(_status); regs.serialize(os); // thread_num and cpu_id are deterministic from the config - SERIALIZE_SCALAR(func_exe_insn); + SERIALIZE_SCALAR(func_exe_inst); } @@ -116,7 +116,7 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_ENUM(_status); regs.unserialize(cp, section); // thread_num and cpu_id are deterministic from the config - UNSERIALIZE_SCALAR(func_exe_insn); + UNSERIALIZE_SCALAR(func_exe_inst); } diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index f3c4b8015..e9dc5efec 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -158,7 +158,7 @@ class ExecContext * number of executed instructions, for matching with syscall trace * points in EIO files. */ - Counter func_exe_insn; + Counter func_exe_inst; // // Count failed store conditionals so we can warn of apparent @@ -189,17 +189,17 @@ class ExecContext int getInstAsid() { return ITB_ASN_ASN(regs.ipr[TheISA::IPR_ITB_ASN]); } int getDataAsid() { return DTB_ASN_ASN(regs.ipr[TheISA::IPR_DTB_ASN]); } - Fault translateInstReq(MemReqPtr req) + Fault translateInstReq(MemReqPtr &req) { return itb->translate(req); } - Fault translateDataReadReq(MemReqPtr req) + Fault translateDataReadReq(MemReqPtr &req) { return dtb->translate(req, false); } - Fault translateDataWriteReq(MemReqPtr req) + Fault translateDataWriteReq(MemReqPtr &req) { return dtb->translate(req, true); } @@ -214,7 +214,7 @@ class ExecContext int getInstAsid() { return asid; } int getDataAsid() { return asid; } - Fault dummyTranslation(MemReqPtr req) + Fault dummyTranslation(MemReqPtr &req) { #if 0 assert((req->vaddr >> 48 & 0xffff) == 0); @@ -225,15 +225,15 @@ class ExecContext req->paddr = req->paddr | (Addr)req->asid << sizeof(Addr) * 8 - 16; return No_Fault; } - Fault translateInstReq(MemReqPtr req) + Fault translateInstReq(MemReqPtr &req) { return dummyTranslation(req); } - Fault translateDataReadReq(MemReqPtr req) + Fault translateDataReadReq(MemReqPtr &req) { return dummyTranslation(req); } - Fault translateDataWriteReq(MemReqPtr req) + Fault translateDataWriteReq(MemReqPtr &req) { return dummyTranslation(req); } @@ -241,7 +241,7 @@ class ExecContext #endif template <class T> - Fault read(MemReqPtr req, T& data) + Fault read(MemReqPtr &req, T &data) { #if defined(TARGET_ALPHA) && defined(FULL_SYSTEM) if (req->flags & LOCKED) { @@ -254,7 +254,7 @@ class ExecContext } template <class T> - Fault write(MemReqPtr req, T& data) + Fault write(MemReqPtr &req, T &data) { #if defined(TARGET_ALPHA) && defined(FULL_SYSTEM) diff --git a/cpu/exetrace.hh b/cpu/exetrace.hh index d05dbe0cd..622ecd729 100644 --- a/cpu/exetrace.hh +++ b/cpu/exetrace.hh @@ -91,8 +91,9 @@ class InstRecord : public Record bool regs_valid; public: - InstRecord(Tick _cycle, BaseCPU *_cpu, StaticInstPtr<TheISA> _staticInst, - Addr _pc, bool spec, unsigned _thread) + InstRecord(Tick _cycle, BaseCPU *_cpu, + const StaticInstPtr<TheISA> &_staticInst, + Addr _pc, bool spec, int _thread) : Record(_cycle), cpu(_cpu), staticInst(_staticInst), PC(_pc), misspeculating(spec), thread(_thread) { diff --git a/cpu/full_cpu/op_class.hh b/cpu/full_cpu/op_class.hh index 67ccaabad..dbaa6624a 100644 --- a/cpu/full_cpu/op_class.hh +++ b/cpu/full_cpu/op_class.hh @@ -51,7 +51,6 @@ enum OpClass { FloatSQRT, /* floating point square root */ RdPort, /* memory read port */ WrPort, /* memory write port */ - LvqPort, /* load value queue read port (redundant threading) */ IPrefPort, Num_OpClasses /* total functional unit classes */ }; diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc index db24bb507..4ec5eed59 100644 --- a/cpu/memtest/memtest.cc +++ b/cpu/memtest/memtest.cc @@ -119,7 +119,7 @@ printData(ostream &os, uint8_t *data, int nbytes) } void -MemTest::completeRequest(MemReqPtr req, uint8_t *data) +MemTest::completeRequest(MemReqPtr &req, uint8_t *data) { switch (req->cmd) { case Read: diff --git a/cpu/memtest/memtest.hh b/cpu/memtest/memtest.hh index 3e7dff968..09f22a177 100644 --- a/cpu/memtest/memtest.hh +++ b/cpu/memtest/memtest.hh @@ -108,7 +108,7 @@ class MemTest : public BaseCPU Statistics::Scalar<> numCopies; // called by MemCompleteEvent::process() - void completeRequest(MemReqPtr req, uint8_t *data); + void completeRequest(MemReqPtr &req, uint8_t *data); friend class MemCompleteEvent; }; @@ -122,7 +122,7 @@ class MemCompleteEvent : public Event public: - MemCompleteEvent(MemReqPtr _req, uint8_t *_data, MemTest *_tester) + MemCompleteEvent(MemReqPtr &_req, uint8_t *_data, MemTest *_tester) : Event(&mainEventQueue), req(_req), data(_data), tester(_tester) { diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 0d5fc4077..2e4dff280 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -321,7 +321,7 @@ change_thread_state(int thread_number, int activate, int priority) // precise architected memory state accessor macros template <class T> Fault -SimpleCPU::read(Addr addr, T& data, unsigned flags) +SimpleCPU::read(Addr addr, T &data, unsigned flags) { memReq->reset(addr, sizeof(T), flags); @@ -653,7 +653,7 @@ SimpleCPU::tick() numInst++; // check for instruction-count-based events - comInsnEventQueue[0]->serviceEvents(numInst); + comInstEventQueue[0]->serviceEvents(numInst); // decode the instruction StaticInstPtr<TheISA> si(inst); @@ -666,7 +666,7 @@ SimpleCPU::tick() xc->regs.ra = (inst >> 21) & 0x1f; #endif // FULL_SYSTEM - xc->func_exe_insn++; + xc->func_exe_inst++; fault = si->execute(this, xc, traceData); #ifdef FS_MEASURE @@ -770,10 +770,10 @@ END_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU) BEGIN_INIT_SIM_OBJECT_PARAMS(SimpleCPU) INIT_PARAM_DFLT(max_insts_any_thread, - "terminate when any thread reaches this insn count", + "terminate when any thread reaches this inst count", 0), INIT_PARAM_DFLT(max_insts_all_threads, - "terminate when all threads have reached this insn count", + "terminate when all threads have reached this inst count", 0), INIT_PARAM_DFLT(max_loads_any_thread, "terminate when any thread reaches this load count", diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 7c9d4ea75..16753fa4f 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -227,7 +227,7 @@ class SimpleCPU : public BaseCPU virtual void unserialize(Checkpoint *cp, const std::string §ion); template <class T> - Fault read(Addr addr, T& data, unsigned flags); + Fault read(Addr addr, T &data, unsigned flags); template <class T> Fault write(T data, Addr addr, unsigned flags, diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 644c7dfc4..f3fd6fa24 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -312,10 +312,11 @@ class StaticInst : public StaticInstBase } /** - * Return the target address for an indirect branch (jump). - * The register value is read from the supplied execution context. - * Invalid if not an indirect branch (i.e. isIndirectCtrl() - * should be true). + * Return the target address for an indirect branch (jump). The + * register value is read from the supplied execution context, so + * the result is valid only if the execution context is about to + * execute the branch in question. Invalid if not an indirect + * branch (i.e. isIndirectCtrl() should be true). */ virtual Addr branchTarget(ExecContext *xc) { diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 89e121ed3..9411c6470 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -74,7 +74,7 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, } Fault -AlphaConsole::read(MemReqPtr req, uint8_t *data) +AlphaConsole::read(MemReqPtr &req, uint8_t *data) { memset(data, 0, req->size); uint64_t val; @@ -110,7 +110,7 @@ AlphaConsole::read(MemReqPtr req, uint8_t *data) } Fault -AlphaConsole::write(MemReqPtr req, const uint8_t *data) +AlphaConsole::write(MemReqPtr &req, const uint8_t *data) { uint64_t val; diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh index 105b03849..4647be538 100644 --- a/dev/alpha_console.hh +++ b/dev/alpha_console.hh @@ -95,8 +95,8 @@ class AlphaConsole : public MmapDevice /** * memory mapped reads and writes */ - virtual Fault read(MemReqPtr req, uint8_t *data); - virtual Fault write(MemReqPtr req, const uint8_t *data); + virtual Fault read(MemReqPtr &req, uint8_t *data); + virtual Fault write(MemReqPtr &req, const uint8_t *data); /** * standard serialization routines for checkpointing diff --git a/dev/etherbus.cc b/dev/etherbus.cc index 3f6036f72..76697dd3e 100644 --- a/dev/etherbus.cc +++ b/dev/etherbus.cc @@ -81,7 +81,7 @@ EtherBus::reg(EtherInt *dev) { devlist.push_back(dev); } bool -EtherBus::send(EtherInt *sndr, PacketPtr pkt) +EtherBus::send(EtherInt *sndr, PacketPtr &pkt) { if (busy()) { DPRINTF(Ethernet, "ethernet packet not sent, bus busy\n", curTick); diff --git a/dev/etherbus.hh b/dev/etherbus.hh index f7f633303..9ef477808 100644 --- a/dev/etherbus.hh +++ b/dev/etherbus.hh @@ -73,7 +73,7 @@ class EtherBus : public SimObject void txDone(); void reg(EtherInt *dev); bool busy() const { return (bool)packet; } - bool send(EtherInt *sender, PacketPtr packet); + bool send(EtherInt *sender, PacketPtr &packet); }; #endif // __ETHERBUS_H__ diff --git a/dev/etherdump.cc b/dev/etherdump.cc index 89f1ce382..6d86adc32 100644 --- a/dev/etherdump.cc +++ b/dev/etherdump.cc @@ -106,7 +106,7 @@ EtherDump::init() } void -EtherDump::dumpPacket(PacketPtr packet) +EtherDump::dumpPacket(PacketPtr &packet) { pcap_pkthdr pkthdr; pkthdr.ts.tv_sec = curtime + (curTick / s_freq); diff --git a/dev/etherdump.hh b/dev/etherdump.hh index b3aefeb74..e22b66166 100644 --- a/dev/etherdump.hh +++ b/dev/etherdump.hh @@ -44,7 +44,7 @@ class EtherDump : public SimObject { private: std::ofstream stream; - void dumpPacket(PacketPtr packet); + void dumpPacket(PacketPtr &packet); void init(); Tick curtime; @@ -54,7 +54,7 @@ class EtherDump : public SimObject public: EtherDump(const std::string &name, const std::string &file); - inline void dump(PacketPtr pkt) { if (stream.is_open()) dumpPacket(pkt); } + inline void dump(PacketPtr &pkt) { if (stream.is_open()) dumpPacket(pkt); } }; #endif // __ETHERDUMP_H__ diff --git a/dev/etherint.hh b/dev/etherint.hh index dfc9f6fd6..70e29eb7c 100644 --- a/dev/etherint.hh +++ b/dev/etherint.hh @@ -54,9 +54,9 @@ class EtherInt : public SimObject virtual ~EtherInt() {} void setPeer(EtherInt *p); - virtual bool recvPacket(PacketPtr packet) = 0; + virtual bool recvPacket(PacketPtr &packet) = 0; void recvDone() { peer->sendDone(); } - bool sendPacket(PacketPtr packet) + bool sendPacket(PacketPtr &packet) { return peer ? peer->recvPacket(packet) : true; } diff --git a/dev/etherlink.cc b/dev/etherlink.cc index c042cac34..676b1da1c 100644 --- a/dev/etherlink.cc +++ b/dev/etherlink.cc @@ -102,7 +102,7 @@ EtherLink::Link::txDone() } bool -EtherLink::Link::transmit(PacketPtr pkt) +EtherLink::Link::transmit(PacketPtr &pkt) { if (busy()) { DPRINTF(Ethernet, "EtherLink packet not sent, link busy\n"); diff --git a/dev/etherlink.hh b/dev/etherlink.hh index ef587faf7..895bac2e1 100644 --- a/dev/etherlink.hh +++ b/dev/etherlink.hh @@ -92,7 +92,7 @@ class EtherLink : public SimObject virtual std::string name() const { return objName; } bool busy() const { return (bool)packet; } - bool transmit(PacketPtr packet); + bool transmit(PacketPtr &packet); void setTxInt(Interface *i) { assert(!txint); txint = i; } void setRxInt(Interface *i) { assert(!rxint); rxint = i; } @@ -108,7 +108,7 @@ class EtherLink : public SimObject public: Interface(const std::string &name, Link *txlink, Link *rxlink); - bool recvPacket(PacketPtr packet) { return txlink->transmit(packet); } + bool recvPacket(PacketPtr &packet) { return txlink->transmit(packet); } void sendDone() { } }; diff --git a/dev/ethertap.cc b/dev/ethertap.cc index 339e7ac78..960d21d73 100644 --- a/dev/ethertap.cc +++ b/dev/ethertap.cc @@ -169,7 +169,7 @@ EtherTap::detach() } bool -EtherTap::recvPacket(PacketPtr packet) +EtherTap::recvPacket(PacketPtr &packet) { if (dump) dump->dump(packet); diff --git a/dev/ethertap.hh b/dev/ethertap.hh index e2b1f640f..0b853a11d 100644 --- a/dev/ethertap.hh +++ b/dev/ethertap.hh @@ -94,7 +94,7 @@ class EtherTap : public EtherInt EtherTap(const std::string &name, EtherDump *dump, int port, int bufsz); virtual ~EtherTap(); - virtual bool recvPacket(PacketPtr packet); + virtual bool recvPacket(PacketPtr &packet); virtual void sendDone(); virtual void serialize(std::ostream &os); diff --git a/kern/tru64/tru64_system.cc b/kern/tru64/tru64_system.cc index 07c655385..1cd98fdc1 100644 --- a/kern/tru64/tru64_system.cc +++ b/kern/tru64/tru64_system.cc @@ -601,7 +601,7 @@ Tru64System::replaceExecContext(ExecContext *xc, int xcIndex) bool Tru64System::breakpoint() { - return remoteGDB[0]->trap(ALPHA_KENTRY_IF); + return remoteGDB[0]->trap(ALPHA_KENTRY_INT); } #ifdef FS_MEASURE diff --git a/sim/serialize.cc b/sim/serialize.cc index 281e7cfc8..180cc38a0 100644 --- a/sim/serialize.cc +++ b/sim/serialize.cc @@ -62,7 +62,7 @@ Serializable::nameOut(ostream &os, const string &_name) template <class T> void -paramOut(ostream &os, const std::string &name, const T& param) +paramOut(ostream &os, const std::string &name, const T ¶m) { os << name << "="; showParam(os, param); @@ -73,7 +73,7 @@ paramOut(ostream &os, const std::string &name, const T& param) template <class T> void paramIn(Checkpoint *cp, const std::string §ion, - const std::string &name, T& param) + const std::string &name, T ¶m) { std::string str; if (!cp->find(section, name, str) || !parseParam(str, param)) { diff --git a/sim/serialize.hh b/sim/serialize.hh index 32802409d..9ab2fa833 100644 --- a/sim/serialize.hh +++ b/sim/serialize.hh @@ -45,11 +45,11 @@ class Serializable; class Checkpoint; template <class T> -void paramOut(std::ostream &os, const std::string &name, const T& param); +void paramOut(std::ostream &os, const std::string &name, const T ¶m); template <class T> void paramIn(Checkpoint *cp, const std::string §ion, - const std::string &name, T& param); + const std::string &name, T ¶m); template <class T> void arrayParamOut(std::ostream &os, const std::string &name, diff --git a/sim/syscall_emul.hh b/sim/syscall_emul.hh index 1031b0823..df4038f71 100644 --- a/sim/syscall_emul.hh +++ b/sim/syscall_emul.hh @@ -141,9 +141,9 @@ class TypedBufferArg : public BaseBufferArg operator T*() { return (T *)bufPtr; } // dereference operators - T& operator*() { return *((T *)bufPtr); } + T &operator*() { return *((T *)bufPtr); } T* operator->() { return (T *)bufPtr; } - T& operator[](int i) { return ((T *)bufPtr)[i]; } + T &operator[](int i) { return ((T *)bufPtr)[i]; } }; ////////////////////////////////////////////////////////////////////// |