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-rw-r--r--src/arch/alpha/interrupts.hh5
-rw-r--r--src/arch/alpha/stacktrace.cc2
-rw-r--r--src/arch/arm/insts/vfp.cc2
-rw-r--r--src/arch/arm/isa/formats/fp.isa8
-rw-r--r--src/base/inifile.cc2
-rw-r--r--src/base/output.cc10
-rw-r--r--src/base/statistics.hh11
-rw-r--r--src/cpu/o3/fu_pool.cc5
-rw-r--r--src/cpu/o3/rob_impl.hh1
-rw-r--r--src/dev/arm/gic_pl390.cc1
-rw-r--r--src/kern/linux/printk.cc8
-rw-r--r--src/mem/cache/cache_impl.hh6
-rw-r--r--src/mem/cache/tags/fa_lru.cc6
-rw-r--r--src/mem/ruby/network/orion/Crossbar/Crossbar.cc2
-rw-r--r--src/mem/ruby/network/orion/OrionRouter.hh2
-rw-r--r--src/mem/ruby/profiler/AddressProfiler.cc6
-rw-r--r--src/mem/ruby/system/System.cc12
-rw-r--r--src/sim/arguments.hh4
-rw-r--r--src/sim/clocked_object.hh4
-rw-r--r--src/sim/process.cc2
20 files changed, 41 insertions, 58 deletions
diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh
index ce3108d79..5749a1f0d 100644
--- a/src/arch/alpha/interrupts.hh
+++ b/src/arch/alpha/interrupts.hh
@@ -158,11 +158,10 @@ class Interrupts : public SimObject
}
}
- uint64_t interrupts = intstatus;
- if (interrupts) {
+ if (intstatus) {
for (uint64_t i = INTLEVEL_EXTERNAL_MIN;
i < INTLEVEL_EXTERNAL_MAX; i++) {
- if (interrupts & (ULL(1) << i)) {
+ if (intstatus & (ULL(1) << i)) {
// See table 4-19 of 21164 hardware reference
ipl = i;
summary |= (ULL(1) << i);
diff --git a/src/arch/alpha/stacktrace.cc b/src/arch/alpha/stacktrace.cc
index 7c23489a3..8c0e85af4 100644
--- a/src/arch/alpha/stacktrace.cc
+++ b/src/arch/alpha/stacktrace.cc
@@ -197,7 +197,7 @@ StackTrace::trace(ThreadContext *_tc, bool is_call)
return;
}
- bool kernel = sys->kernelStart <= pc && pc <= sys->kernelEnd;
+ kernel = sys->kernelStart <= pc && pc <= sys->kernelEnd;
if (!kernel)
return;
diff --git a/src/arch/arm/insts/vfp.cc b/src/arch/arm/insts/vfp.cc
index 6e15282f8..015247d68 100644
--- a/src/arch/arm/insts/vfp.cc
+++ b/src/arch/arm/insts/vfp.cc
@@ -995,7 +995,6 @@ FpOp::binaryOp(FPSCR &fpscr, fpType op1, fpType op2,
// Get NAN behavior right. This varies between x86 and ARM.
if (std::isnan(dest)) {
- const bool single = (sizeof(fpType) == sizeof(float));
const uint64_t qnan =
single ? 0x7fc00000 : ULL(0x7ff8000000000000);
const bool nan1 = std::isnan(op1);
@@ -1066,7 +1065,6 @@ FpOp::unaryOp(FPSCR &fpscr, fpType op1, fpType (*func)(fpType),
// Get NAN behavior right. This varies between x86 and ARM.
if (std::isnan(dest)) {
- const bool single = (sizeof(fpType) == sizeof(float));
const uint64_t qnan =
single ? 0x7fc00000 : ULL(0x7ff8000000000000);
const bool nan = std::isnan(op1);
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index 0cb27d7f1..6d779e541 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -1570,13 +1570,6 @@ let {{
}
case 0x6:
if (b == 0xc) {
- const IntRegIndex vd =
- (IntRegIndex)(2 * (bits(machInst, 15, 12) |
- (bits(machInst, 22) << 4)));
- const IntRegIndex vm =
- (IntRegIndex)(2 * (bits(machInst, 3, 0) |
- (bits(machInst, 5) << 4)));
- unsigned size = bits(machInst, 19, 18);
return decodeNeonSTwoShiftUSReg<NVshll>(
size, machInst, vd, vm, 8 << size);
} else {
@@ -1866,7 +1859,6 @@ let {{
case 0x3:
const bool up = (bits(machInst, 23) == 1);
const uint32_t imm = bits(machInst, 7, 0) << 2;
- RegIndex vd;
if (single) {
vd = (RegIndex)(uint32_t)((bits(machInst, 15, 12) << 1) |
(bits(machInst, 22)));
diff --git a/src/base/inifile.cc b/src/base/inifile.cc
index 91e37f327..011887635 100644
--- a/src/base/inifile.cc
+++ b/src/base/inifile.cc
@@ -254,7 +254,7 @@ IniFile::Section::printUnreferenced(const string &sectionName)
for (EntryTable::iterator ei = table.begin();
ei != table.end(); ++ei) {
const string &entryName = ei->first;
- Entry *entry = ei->second;
+ entry = ei->second;
if (entryName == "unref_section_ok" ||
entryName == "unref_entries_ok")
diff --git a/src/base/output.cc b/src/base/output.cc
index c0ddd0fae..912ec20e9 100644
--- a/src/base/output.cc
+++ b/src/base/output.cc
@@ -233,27 +233,27 @@ OutputDirectory::remove(const string &name, bool recursive)
} else {
// assume 'name' is a directory
if (recursive) {
- DIR *dir = opendir(fname.c_str());
+ DIR *subdir = opendir(fname.c_str());
// silently ignore removal request for non-existent directory
- if ((!dir) && (errno == ENOENT))
+ if ((!subdir) && (errno == ENOENT))
return;
// fail on other errors
- if (!dir) {
+ if (!subdir) {
perror("opendir");
fatal("Error opening directory for recursive removal '%s'\n",
fname);
}
- struct dirent *de = readdir(dir);
+ struct dirent *de = readdir(subdir);
while (de != NULL) {
// ignore files starting with a '.'; user must delete those
// manually if they really want to
if (de->d_name[0] != '.')
remove(name + PATH_SEPARATOR + de->d_name, recursive);
- de = readdir(dir);
+ de = readdir(subdir);
}
}
diff --git a/src/base/statistics.hh b/src/base/statistics.hh
index 723c8bd9c..c46eedfde 100644
--- a/src/base/statistics.hh
+++ b/src/base/statistics.hh
@@ -1416,9 +1416,8 @@ class DistStor
data.underflow = underflow;
data.overflow = overflow;
- size_type buckets = params->buckets;
- data.cvec.resize(buckets);
- for (off_type i = 0; i < buckets; ++i)
+ data.cvec.resize(params->buckets);
+ for (off_type i = 0; i < params->buckets; ++i)
data.cvec[i] = cvec[i];
data.sum = sum;
@@ -2372,13 +2371,13 @@ class SumNode : public Node
size_type size = lvec.size();
assert(size > 0);
- Result vresult = 0.0;
+ Result result = 0.0;
Op op;
for (off_type i = 0; i < size; ++i)
- vresult = op(vresult, lvec[i]);
+ result = op(result, lvec[i]);
- return vresult;
+ return result;
}
size_type size() const { return 1; }
diff --git a/src/cpu/o3/fu_pool.cc b/src/cpu/o3/fu_pool.cc
index c0db5cbfc..78af428db 100644
--- a/src/cpu/o3/fu_pool.cc
+++ b/src/cpu/o3/fu_pool.cc
@@ -135,10 +135,7 @@ FUPool::FUPool(const Params *p)
numFU++;
// Add the appropriate number of copies of this FU to the list
- ostringstream s;
-
- s << (*i)->name() << "(0)";
- fu->name = s.str();
+ fu->name = (*i)->name() + "(0)";
funcUnits.push_back(fu);
for (int c = 1; c < (*i)->number; ++c) {
diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh
index 5f62ce539..b33221f15 100644
--- a/src/cpu/o3/rob_impl.hh
+++ b/src/cpu/o3/rob_impl.hh
@@ -404,7 +404,6 @@ template <class Impl>
void
ROB<Impl>::updateHead()
{
- DynInstPtr head_inst;
InstSeqNum lowest_num = 0;
bool first_valid = true;
diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc
index 0cd435938..a33ec800f 100644
--- a/src/dev/arm/gic_pl390.cc
+++ b/src/dev/arm/gic_pl390.cc
@@ -231,7 +231,6 @@ Pl390::readDistributor(PacketPtr pkt)
cpuTarget[int_num+3] << 24) ;
}
} else {
- int ctx_id = pkt->req->contextId();
assert(ctx_id < sys->numRunningContexts());
pkt->set<uint32_t>(ctx_id);
}
diff --git a/src/kern/linux/printk.cc b/src/kern/linux/printk.cc
index e856e2263..7a4c551ce 100644
--- a/src/kern/linux/printk.cc
+++ b/src/kern/linux/printk.cc
@@ -186,17 +186,17 @@ Printk(stringstream &out, Arguments args)
case 'c': {
uint64_t mask = (*p == 'C') ? 0xffL : 0x7fL;
uint64_t num;
- int width;
+ int cwidth;
if (islong) {
num = (uint64_t)args;
- width = sizeof(uint64_t);
+ cwidth = sizeof(uint64_t);
} else {
num = (uint32_t)args;
- width = sizeof(uint32_t);
+ cwidth = sizeof(uint32_t);
}
- while (width-- > 0) {
+ while (cwidth-- > 0) {
char c = (char)(num & mask);
if (c)
out << c;
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index b30132748..8f7938b93 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -319,8 +319,8 @@ Cache<TagStore>::access(PacketPtr pkt, BlkType *&blk,
incMissCount(pkt);
return false;
}
- int id = pkt->req->masterId();
- tags->insertBlock(pkt->getAddr(), blk, id);
+ int master_id = pkt->req->masterId();
+ tags->insertBlock(pkt->getAddr(), blk, master_id);
blk->status = BlkValid | BlkReadable;
}
std::memcpy(blk->data, pkt->getPtr<uint8_t>(), blkSize);
@@ -1005,7 +1005,7 @@ Cache<TagStore>::recvTimingResp(PacketPtr pkt)
if (blk) {
blk->status &= ~BlkReadable;
}
- MSHRQueue *mq = mshr->queue;
+ mq = mshr->queue;
mq->markPending(mshr);
requestMemSideBus((RequestCause)mq->index, curTick() +
pkt->busLastWordDelay);
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 1a607dc80..efb8b89df 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -270,16 +270,16 @@ bool
FALRU::check()
{
FALRUBlk* blk = head;
- int size = 0;
+ int tot_size = 0;
int boundary = 1<<17;
int j = 0;
int flags = cacheMask;
while (blk) {
- size += blkSize;
+ tot_size += blkSize;
if (blk->inCache != flags) {
return false;
}
- if (size == boundary && blk != tail) {
+ if (tot_size == boundary && blk != tail) {
if (cacheBoundaries[j] != blk) {
return false;
}
diff --git a/src/mem/ruby/network/orion/Crossbar/Crossbar.cc b/src/mem/ruby/network/orion/Crossbar/Crossbar.cc
index 1ae699d55..5f0f2206d 100644
--- a/src/mem/ruby/network/orion/Crossbar/Crossbar.cc
+++ b/src/mem/ruby/network/orion/Crossbar/Crossbar.cc
@@ -306,7 +306,7 @@ double Crossbar::calc_ctr_cap(double cap_wire_, bool prev_ctr_, bool next_ctr_)
//FIXME Wmemcellr and resize
double Wmemcellr = m_tech_param_ptr->get_Wmemcellr();
double nsize = Wmemcellr;
- double trans_cap = m_tech_param_ptr->calc_gatecap(nsize, 0);
+ trans_cap = m_tech_param_ptr->calc_gatecap(nsize, 0);
if (m_trans_type == NP_GATE)
{
double Wdecinvn = m_tech_param_ptr->get_Wdecinvn();
diff --git a/src/mem/ruby/network/orion/OrionRouter.hh b/src/mem/ruby/network/orion/OrionRouter.hh
index 38f808aef..ac3d2e9e1 100644
--- a/src/mem/ruby/network/orion/OrionRouter.hh
+++ b/src/mem/ruby/network/orion/OrionRouter.hh
@@ -98,7 +98,7 @@ class OrionRouter
uint32_t m_num_out_port;
uint32_t m_flit_width;
uint32_t m_num_vclass;
- uint32_t num_vc_per_vclass_;
+ uint32_t num_vc_per_vclass;
uint32_t m_total_num_vc;
uint32_t* m_num_vc_per_vclass_ary;
uint32_t* m_in_buf_num_set_ary;
diff --git a/src/mem/ruby/profiler/AddressProfiler.cc b/src/mem/ruby/profiler/AddressProfiler.cc
index a9c9a9591..0d5d135eb 100644
--- a/src/mem/ruby/profiler/AddressProfiler.cc
+++ b/src/mem/ruby/profiler/AddressProfiler.cc
@@ -100,9 +100,9 @@ printSorted(ostream& out, int num_of_sequencers, const AddressMap &record_map,
std::vector<int64> m_touched_weighted_vec;
m_touched_vec.resize(num_of_sequencers+1);
m_touched_weighted_vec.resize(num_of_sequencers+1);
- for (int i = 0; i < m_touched_vec.size(); i++) {
- m_touched_vec[i] = 0;
- m_touched_weighted_vec[i] = 0;
+ for (int j = 0; j < m_touched_vec.size(); j++) {
+ m_touched_vec[j] = 0;
+ m_touched_weighted_vec[j] = 0;
}
int counter = 0;
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index ab441560c..f1a6a91b8 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -482,8 +482,8 @@ RubySystem::functionalRead(PacketPtr pkt)
DPRINTF(RubySystem, "reading from %s block %s\n",
m_abs_cntrl_vec[i]->name(), block);
- for (unsigned i = 0; i < size_in_bytes; ++i) {
- data[i] = block.getByte(i + startByte);
+ for (unsigned j = 0; j < size_in_bytes; ++j) {
+ data[j] = block.getByte(j + startByte);
}
return true;
}
@@ -507,8 +507,8 @@ RubySystem::functionalRead(PacketPtr pkt)
DPRINTF(RubySystem, "reading from %s block %s\n",
m_abs_cntrl_vec[i]->name(), block);
- for (unsigned i = 0; i < size_in_bytes; ++i) {
- data[i] = block.getByte(i + startByte);
+ for (unsigned j = 0; j < size_in_bytes; ++j) {
+ data[j] = block.getByte(j + startByte);
}
return true;
}
@@ -545,8 +545,8 @@ RubySystem::functionalWrite(PacketPtr pkt)
DataBlock& block = m_abs_cntrl_vec[i]->getDataBlock(line_addr);
DPRINTF(RubySystem, "%s\n",block);
- for (unsigned i = 0; i < size_in_bytes; ++i) {
- block.setByte(i + startByte, data[i]);
+ for (unsigned j = 0; j < size_in_bytes; ++j) {
+ block.setByte(j + startByte, data[j]);
}
DPRINTF(RubySystem, "%s\n",block);
}
diff --git a/src/sim/arguments.hh b/src/sim/arguments.hh
index f28f6635a..fad955999 100644
--- a/src/sim/arguments.hh
+++ b/src/sim/arguments.hh
@@ -130,8 +130,8 @@ class Arguments
template <class T>
operator T() {
assert(sizeof(T) <= sizeof(uint64_t));
- T data = static_cast<T>(getArg(sizeof(T)));
- return data;
+ T d = static_cast<T>(getArg(sizeof(T)));
+ return d;
}
template <class T>
diff --git a/src/sim/clocked_object.hh b/src/sim/clocked_object.hh
index e04e9338d..bf132bee1 100644
--- a/src/sim/clocked_object.hh
+++ b/src/sim/clocked_object.hh
@@ -184,8 +184,8 @@ class ClockedObject : public SimObject
inline Tick clockPeriod() const { return clock; }
- inline Cycles ticksToCycles(Tick tick) const
- { return Cycles(tick / clock); }
+ inline Cycles ticksToCycles(Tick t) const
+ { return Cycles(t / clock); }
};
diff --git a/src/sim/process.cc b/src/sim/process.cc
index 08636b2c4..9921ef0b7 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -167,7 +167,7 @@ Process::Process(ProcessParams * params)
// mark remaining fds as free
for (int i = 3; i <= MAX_FD; ++i) {
- Process::FdMap *fdo = &fd_map[i];
+ fdo = &fd_map[i];
fdo->fd = -1;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-12 10:54:21 +0000