diff options
| -rw-r--r-- | src/cpu/base.cc | 17 | ||||
| -rw-r--r-- | src/mem/bridge.cc | 2 | ||||
| -rw-r--r-- | src/mem/port.cc | 26 | ||||
| -rw-r--r-- | src/mem/port.hh | 9 |
4 files changed, 29 insertions, 25 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 23195f720..6ce082996 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -351,22 +351,17 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc) // Connect new CPU to old CPU's memory only if new CPU isn't // connected to anything. Also connect old CPU's memory to new // CPU. - Port *peer; - if (ic->getPeer() == NULL || ic->getPeer()->isDefaultPort()) { - peer = oldCPU->getPort("icache_port")->getPeer(); + if (!ic->isConnected()) { + Port *peer = oldCPU->getPort("icache_port")->getPeer(); ic->setPeer(peer); - } else { - peer = ic->getPeer(); + peer->setPeer(ic); } - peer->setPeer(ic); - if (dc->getPeer() == NULL || dc->getPeer()->isDefaultPort()) { - peer = oldCPU->getPort("dcache_port")->getPeer(); + if (!dc->isConnected()) { + Port *peer = oldCPU->getPort("dcache_port")->getPeer(); dc->setPeer(peer); - } else { - peer = dc->getPeer(); + peer->setPeer(dc); } - peer->setPeer(dc); } diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc index 3d3966491..c09cacc00 100644 --- a/src/mem/bridge.cc +++ b/src/mem/bridge.cc @@ -89,7 +89,7 @@ void Bridge::init() { // Make sure that both sides are connected to. - if (portA.getPeer() == NULL || portB.getPeer() == NULL) + if (!portA.isConnected() || !portB.isConnected()) fatal("Both ports of bus bridge are not connected to a bus.\n"); if (portA.peerBlockSize() != portB.peerBlockSize()) diff --git a/src/mem/port.cc b/src/mem/port.cc index ce3f6c74b..0e03194c9 100644 --- a/src/mem/port.cc +++ b/src/mem/port.cc @@ -39,17 +39,18 @@ #include "mem/mem_object.hh" #include "mem/port.hh" -class defaultPeerPortClass: public Port +class DefaultPeerPort : public Port { protected: void blowUp() { - fatal("Unconnected port!"); + fatal("%s: Unconnected port!", peer->name()); } public: - defaultPeerPortClass() : Port("default_port") - {} + DefaultPeerPort() + : Port("default_port") + { } bool recvTiming(PacketPtr) { @@ -84,16 +85,22 @@ class defaultPeerPortClass: public Port blowUp(); } - bool isDefaultPort() { return true; } + bool isDefaultPort() const { return true; } +}; -} defaultPeerPort; +DefaultPeerPort defaultPeerPort; -Port::Port() : peer(&defaultPeerPort), owner(NULL) +Port::Port() + : peer(&defaultPeerPort), owner(NULL) { } -Port::Port(const std::string &_name, MemObject *_owner) : - portName(_name), peer(&defaultPeerPort), owner(_owner) +Port::Port(const std::string &_name, MemObject *_owner) + : portName(_name), peer(&defaultPeerPort), owner(_owner) +{ +} + +Port::~Port() { } @@ -101,6 +108,7 @@ void Port::setPeer(Port *port) { DPRINTF(Config, "setting peer to %s\n", port->name()); + peer = port; } diff --git a/src/mem/port.hh b/src/mem/port.hh index f66b566ea..15fda2164 100644 --- a/src/mem/port.hh +++ b/src/mem/port.hh @@ -73,8 +73,7 @@ class MemObject; */ class Port { - private: - + protected: /** Descriptive name (for DPRINTF output) */ mutable std::string portName; @@ -103,7 +102,7 @@ class Port /** Return port name (for DPRINTF). */ const std::string &name() const { return portName; } - virtual ~Port() {}; + virtual ~Port(); // mey be better to use subclasses & RTTI? /** Holds the ports status. Currently just that a range recomputation needs @@ -131,7 +130,9 @@ class Port * demise. */ void removeConn(); - virtual bool isDefaultPort() { return false; } + virtual bool isDefaultPort() const { return false; } + + bool isConnected() { return peer && !peer->isDefaultPort(); } protected: |