diff options
| -rw-r--r-- | src/cpu/inorder/cpu.cc | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index 01eab9af7..f1c531c53 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -1135,10 +1135,16 @@ InOrderCPU::readFloatRegBits(RegIndex reg_idx, ThreadID tid) void InOrderCPU::setIntReg(RegIndex reg_idx, uint64_t val, ThreadID tid) { - DPRINTF(IntRegs, "[tid:%i]: Setting Int. Reg %i to %x\n", - tid, reg_idx, val); + if (reg_idx == TheISA::ZeroReg) { + DPRINTF(IntRegs, "[tid:%i]: Ignoring Setting of ISA-ZeroReg " + "(Int. Reg %i) to %x\n", tid, reg_idx, val); + return; + } else { + DPRINTF(IntRegs, "[tid:%i]: Setting Int. Reg %i to %x\n", + tid, reg_idx, val); - intRegs[tid][reg_idx] = val; + intRegs[tid][reg_idx] = val; + } } |