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-rw-r--r--src/arch/alpha/isa/mem.isa2
-rw-r--r--src/arch/arm/isa/templates/mem.isa8
-rw-r--r--src/arch/arm/isa/templates/mem64.isa2
-rw-r--r--src/arch/arm/isa/templates/neon64.isa5
-rw-r--r--src/arch/generic/memhelpers.hh10
-rw-r--r--src/arch/mips/isa/formats/mem.isa2
-rw-r--r--src/arch/power/isa/formats/mem.isa2
-rw-r--r--src/arch/sparc/isa/formats/mem/util.isa2
-rw-r--r--src/arch/x86/isa/formats/monitor_mwait.isa3
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa2
-rw-r--r--src/arch/x86/memhelpers.hh7
-rw-r--r--src/cpu/base_dyn_inst.hh12
-rw-r--r--src/cpu/exec_context.hh30
-rw-r--r--src/cpu/minor/exec_context.hh5
-rw-r--r--src/cpu/simple/atomic.cc6
-rw-r--r--src/cpu/simple/atomic.hh2
-rw-r--r--src/cpu/simple/base.hh2
-rw-r--r--src/cpu/simple/exec_context.hh6
-rw-r--r--src/cpu/simple/timing.cc7
-rw-r--r--src/cpu/simple/timing.hh2
20 files changed, 79 insertions, 38 deletions
diff --git a/src/arch/alpha/isa/mem.isa b/src/arch/alpha/isa/mem.isa
index 71b134340..6ba8ee5d0 100644
--- a/src/arch/alpha/isa/mem.isa
+++ b/src/arch/alpha/isa/mem.isa
@@ -223,7 +223,7 @@ def template LoadInitiateAcc {{
%(ea_code)s;
if (fault == NoFault) {
- fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags);
+ fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);
}
return fault;
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index bac1cd211..51f598f50 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -438,7 +438,8 @@ def template LoadInitiateAcc {{
if (%(predicate_test)s)
{
if (fault == NoFault) {
- fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags);
+ fault = initiateMemRead(xc, traceData, EA, Mem,
+ memAccessFlags);
}
} else {
xc->setPredicate(false);
@@ -461,13 +462,10 @@ def template NeonLoadInitiateAcc {{
%(op_rd)s;
%(ea_code)s;
- MemUnion memUnion;
- uint8_t *dataPtr = memUnion.bytes;
-
if (%(predicate_test)s)
{
if (fault == NoFault) {
- fault = xc->readMem(EA, dataPtr, %(size)d, memAccessFlags);
+ fault = xc->initiateMemRead(EA, %(size)d, memAccessFlags);
}
} else {
xc->setPredicate(false);
diff --git a/src/arch/arm/isa/templates/mem64.isa b/src/arch/arm/isa/templates/mem64.isa
index 72ee882a7..e831f17a5 100644
--- a/src/arch/arm/isa/templates/mem64.isa
+++ b/src/arch/arm/isa/templates/mem64.isa
@@ -191,7 +191,7 @@ def template Load64InitiateAcc {{
%(ea_code)s;
if (fault == NoFault) {
- fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags);
+ fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);
}
return fault;
diff --git a/src/arch/arm/isa/templates/neon64.isa b/src/arch/arm/isa/templates/neon64.isa
index 19dd50910..6356073c5 100644
--- a/src/arch/arm/isa/templates/neon64.isa
+++ b/src/arch/arm/isa/templates/neon64.isa
@@ -313,11 +313,8 @@ def template NeonLoadInitiateAcc64 {{
%(op_rd)s;
%(ea_code)s;
- MemUnion memUnion;
- uint8_t *dataPtr = memUnion.bytes;
-
if (fault == NoFault) {
- fault = xc->readMem(EA, dataPtr, accSize, memAccessFlags);
+ fault = xc->initiateMemRead(EA, accSize, memAccessFlags);
}
return fault;
diff --git a/src/arch/generic/memhelpers.hh b/src/arch/generic/memhelpers.hh
index aa082553a..b12e7b0b1 100644
--- a/src/arch/generic/memhelpers.hh
+++ b/src/arch/generic/memhelpers.hh
@@ -48,13 +48,15 @@
#include "sim/byteswap.hh"
#include "sim/insttracer.hh"
-/// Read from memory in timing mode.
+/// Initiate a read from memory in timing mode. Note that the 'mem'
+/// parameter is unused; only the type of that parameter is used
+/// to determine the size of the access.
template <class XC, class MemT>
Fault
-readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr,
- MemT &mem, unsigned flags)
+initiateMemRead(XC *xc, Trace::InstRecord *traceData, Addr addr,
+ MemT &mem, unsigned flags)
{
- return xc->readMem(addr, (uint8_t *)&mem, sizeof(MemT), flags);
+ return xc->initiateMemRead(addr, sizeof(MemT), flags);
}
/// Extract the data returned from a timing mode read.
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index 80107be8b..052ead82c 100644
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -253,7 +253,7 @@ def template LoadInitiateAcc {{
%(ea_code)s;
if (fault == NoFault) {
- fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags);
+ fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);
}
return fault;
diff --git a/src/arch/power/isa/formats/mem.isa b/src/arch/power/isa/formats/mem.isa
index 0c0dff6ca..eafd6aea7 100644
--- a/src/arch/power/isa/formats/mem.isa
+++ b/src/arch/power/isa/formats/mem.isa
@@ -109,7 +109,7 @@ def template LoadInitiateAcc {{
%(ea_code)s;
if (fault == NoFault) {
- fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags);
+ fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);
xc->setEA(EA);
}
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index 53559e493..a5c64dda5 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -171,7 +171,7 @@ def template LoadInitiateAcc {{
%(fault_check)s;
if (fault == NoFault) {
%(EA_trunc)s
- fault = readMemTiming(xc, traceData, EA, Mem, %(asi_val)s);
+ fault = initiateMemRead(xc, traceData, EA, Mem, %(asi_val)s);
}
return fault;
}
diff --git a/src/arch/x86/isa/formats/monitor_mwait.isa b/src/arch/x86/isa/formats/monitor_mwait.isa
index b26c1f267..c901ceded 100644
--- a/src/arch/x86/isa/formats/monitor_mwait.isa
+++ b/src/arch/x86/isa/formats/monitor_mwait.isa
@@ -67,10 +67,9 @@ def template MwaitInitiateAcc {{
Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc,
Trace::InstRecord * traceData) const
{
- uint64_t m = 0; //mem
unsigned s = 0x8; //size
unsigned f = 0; //flags
- readMemTiming(xc, traceData, xc->getAddrMonitor()->vAddr, m, s, f);
+ initiateMemRead(xc, traceData, xc->getAddrMonitor()->vAddr, s, f);
return NoFault;
}
}};
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index a7c201f44..fa8bc6f2b 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -127,7 +127,7 @@ def template MicroLoadInitiateAcc {{
%(ea_code)s;
DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);
- fault = readMemTiming(xc, traceData, EA, Mem, dataSize, memFlags);
+ fault = initiateMemRead(xc, traceData, EA, dataSize, memFlags);
return fault;
}
diff --git a/src/arch/x86/memhelpers.hh b/src/arch/x86/memhelpers.hh
index 640327325..705457d67 100644
--- a/src/arch/x86/memhelpers.hh
+++ b/src/arch/x86/memhelpers.hh
@@ -38,12 +38,13 @@
namespace X86ISA
{
+/// Initiate a read from memory in timing mode.
template <class XC>
Fault
-readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr,
- uint64_t &mem, unsigned dataSize, unsigned flags)
+initiateMemRead(XC *xc, Trace::InstRecord *traceData, Addr addr,
+ unsigned dataSize, unsigned flags)
{
- return xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
+ return xc->initiateMemRead(addr, dataSize, flags);
}
static inline uint64_t
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index b6b8c045a..031337aec 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -313,7 +313,7 @@ class BaseDynInst : public ExecContext, public RefCounted
cpu->demapPage(vaddr, asn);
}
- Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
+ Fault initiateMemRead(Addr addr, unsigned size, unsigned flags);
Fault writeMem(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res);
@@ -873,8 +873,7 @@ class BaseDynInst : public ExecContext, public RefCounted
template<class Impl>
Fault
-BaseDynInst<Impl>::readMem(Addr addr, uint8_t *data,
- unsigned size, unsigned flags)
+BaseDynInst<Impl>::initiateMemRead(Addr addr, unsigned size, unsigned flags)
{
instFlags[ReqMade] = true;
Request *req = NULL;
@@ -916,13 +915,6 @@ BaseDynInst<Impl>::readMem(Addr addr, uint8_t *data,
// instruction as executed.
this->setExecuted();
}
-
- if (fault != NoFault) {
- // Return a fixed value to keep simulation deterministic even
- // along misspeculated paths.
- if (data)
- bzero(data, size);
- }
}
if (traceData)
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index c65841db2..951c9c2b3 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -12,6 +12,7 @@
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
+ * Copyright (c) 2015 Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -173,9 +174,36 @@ class ExecContext {
*/
virtual Addr getEA() const = 0;
+ /**
+ * Perform an atomic memory read operation. Must be overridden
+ * for exec contexts that support atomic memory mode. Not pure
+ * virtual since exec contexts that only support timing memory
+ * mode need not override (though in that case this function
+ * should never be called).
+ */
virtual Fault readMem(Addr addr, uint8_t *data, unsigned int size,
- unsigned int flags) = 0;
+ unsigned int flags)
+ {
+ panic("ExecContext::readMem() should be overridden\n");
+ }
+ /**
+ * Initiate a timing memory read operation. Must be overridden
+ * for exec contexts that support timing memory mode. Not pure
+ * virtual since exec contexts that only support atomic memory
+ * mode need not override (though in that case this function
+ * should never be called).
+ */
+ virtual Fault initiateMemRead(Addr addr, unsigned int size,
+ unsigned int flags)
+ {
+ panic("ExecContext::initiateMemRead() should be overridden\n");
+ }
+
+ /**
+ * For atomic-mode contexts, perform an atomic memory write operation.
+ * For timing-mode contexts, initiate a timing memory write operation.
+ */
virtual Fault writeMem(uint8_t *data, unsigned int size, Addr addr,
unsigned int flags, uint64_t *res) = 0;
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index 625d2b877..092ad5a2d 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -103,10 +103,9 @@ class ExecContext : public ::ExecContext
}
Fault
- readMem(Addr addr, uint8_t *data, unsigned int size,
- unsigned int flags)
+ initiateMemRead(Addr addr, unsigned int size, unsigned int flags)
{
- execute.getLSQ().pushRequest(inst, true /* load */, data,
+ execute.getLSQ().pushRequest(inst, true /* load */, nullptr,
size, addr, flags, NULL);
return NoFault;
}
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 77706966b..4afd019d0 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -415,6 +415,12 @@ AtomicSimpleCPU::readMem(Addr addr, uint8_t * data,
}
}
+Fault
+AtomicSimpleCPU::initiateMemRead(Addr addr, unsigned size, unsigned flags)
+{
+ panic("initiateMemRead() is for timing accesses, and should "
+ "never be called on AtomicSimpleCPU.\n");
+}
Fault
AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size,
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index 1a2f19949..c643bfe58 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -205,6 +205,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU
Fault readMem(Addr addr, uint8_t *data, unsigned size,
unsigned flags) override;
+ Fault initiateMemRead(Addr addr, unsigned size, unsigned flags) override;
+
Fault writeMem(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res) override;
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 0ec9e502b..9164a2960 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -145,6 +145,8 @@ class BaseSimpleCPU : public BaseCPU
virtual Fault readMem(Addr addr, uint8_t* data, unsigned size,
unsigned flags) = 0;
+ virtual Fault initiateMemRead(Addr addr, unsigned size, unsigned flags) = 0;
+
virtual Fault writeMem(uint8_t* data, unsigned size, Addr addr,
unsigned flags, uint64_t* res) = 0;
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 43a012404..f9d80d0d5 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -291,6 +291,12 @@ class SimpleExecContext : public ExecContext {
return cpu->readMem(addr, data, size, flags);
}
+ Fault initiateMemRead(Addr addr, unsigned int size,
+ unsigned int flags) override
+ {
+ return cpu->initiateMemRead(addr, size, flags);
+ }
+
Fault writeMem(uint8_t *data, unsigned int size, Addr addr,
unsigned int flags, uint64_t *res) override
{
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 6d67f610b..441d5f896 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -407,6 +407,13 @@ Fault
TimingSimpleCPU::readMem(Addr addr, uint8_t *data,
unsigned size, unsigned flags)
{
+ panic("readMem() is for atomic accesses, and should "
+ "never be called on TimingSimpleCPU.\n");
+}
+
+Fault
+TimingSimpleCPU::initiateMemRead(Addr addr, unsigned size, unsigned flags)
+{
SimpleExecContext &t_info = *threadInfo[curThread];
SimpleThread* thread = t_info.thread;
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 36e01e9be..da8320793 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -286,6 +286,8 @@ class TimingSimpleCPU : public BaseSimpleCPU
Fault readMem(Addr addr, uint8_t *data, unsigned size,
unsigned flags) override;
+ Fault initiateMemRead(Addr addr, unsigned size, unsigned flags) override;
+
Fault writeMem(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res) override;
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-23 12:08:09 +0000