diff options
| -rw-r--r-- | src/arch/x86/isa/insts/data_conversion/sign_extension.py | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/arch/x86/isa/insts/data_conversion/sign_extension.py b/src/arch/x86/isa/insts/data_conversion/sign_extension.py index e96eee694..6a2612c3c 100644 --- a/src/arch/x86/isa/insts/data_conversion/sign_extension.py +++ b/src/arch/x86/isa/insts/data_conversion/sign_extension.py @@ -53,7 +53,18 @@ # # Authors: Gabe Black -microcode = "" +microcode = ''' +def macroop CDQE_R { + sext reg, reg, "env.dataSize << 2" +}; + +def macroop CQO_R_R { + # A shift might be slower than, for example, an explicit sign extension, + # so it might be worthwhile to try to find an alternative. + mov regm, regm, reg + sra regm, regm, "env.dataSize * 8 - 1" +}; +''' #let {{ # class CBW(Inst): # "GenFault ${new UnimpInstFault}" |