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-rw-r--r--src/mem/slicc/symbols/StateMachine.py36
1 files changed, 34 insertions, 2 deletions
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 4f25f68e9..cf53e8398 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -233,8 +233,8 @@ public:
void print(ostream& out) const;
void printConfig(ostream& out) const;
void wakeup();
- void printStats(ostream& out) const { s_profiler.dumpStats(out); }
- void clearStats() { s_profiler.clearStats(); }
+ void printStats(ostream& out) const;
+ void clearStats();
void blockOnQueue(Address addr, MessageBuffer* port);
void unblock(Address addr);
private:
@@ -587,6 +587,38 @@ void $c_ident::printConfig(ostream& out) const {
}
}
+void $c_ident::printStats(ostream& out) const {
+''')
+ #
+ # Cache and Memory Controllers have specific profilers associated with
+ # them. Print out these stats before dumping state transition stats.
+ #
+ for param in self.config_parameters:
+ if param.type_ast.type.ident == "CacheMemory" or \
+ param.type_ast.type.ident == "MemoryControl":
+ assert(param.pointer)
+ code(' m_${{param.ident}}_ptr->printStats(out);')
+
+ code('''
+ s_profiler.dumpStats(out);
+}
+
+void $c_ident::clearStats() {
+''')
+ #
+ # Cache and Memory Controllers have specific profilers associated with
+ # them. These stats must be cleared too.
+ #
+ for param in self.config_parameters:
+ if param.type_ast.type.ident == "CacheMemory" or \
+ param.type_ast.type.ident == "MemoryControl":
+ assert(param.pointer)
+ code(' m_${{param.ident}}_ptr->clearStats();')
+
+ code('''
+ s_profiler.clearStats();
+}
+
// Actions
''')