diff options
| -rw-r--r-- | SConscript | 108 | ||||
| -rw-r--r-- | arch/SConscript | 25 | ||||
| -rwxr-xr-x | arch/isa_parser.py | 53 | ||||
| -rw-r--r-- | build/SConstruct | 9 | ||||
| -rw-r--r-- | cpu/SConscript | 99 | ||||
| -rw-r--r-- | cpu/cpu_models.py | 71 | ||||
| -rw-r--r-- | cpu/static_inst.hh | 6 |
7 files changed, 256 insertions, 115 deletions
diff --git a/SConscript b/SConscript index 3e607caa4..966cb6d3e 100644 --- a/SConscript +++ b/SConscript @@ -86,31 +86,7 @@ base_sources = Split(''' cpu/exetrace.cc cpu/pc_event.cc cpu/static_inst.cc - cpu/o3/2bit_local_pred.cc - cpu/o3/alpha_dyn_inst.cc - cpu/o3/alpha_cpu.cc - cpu/o3/alpha_cpu_builder.cc - cpu/o3/bpred_unit.cc - cpu/o3/btb.cc - cpu/o3/commit.cc - cpu/o3/decode.cc - cpu/o3/fetch.cc - cpu/o3/free_list.cc - cpu/o3/cpu.cc - cpu/o3/iew.cc - cpu/o3/inst_queue.cc - cpu/o3/ldstq.cc - cpu/o3/mem_dep_unit.cc - cpu/o3/ras.cc - cpu/o3/rename.cc - cpu/o3/rename_map.cc - cpu/o3/rob.cc - cpu/o3/sat_counter.cc - cpu/o3/store_set.cc - cpu/o3/tournament_pred.cc - cpu/fast/cpu.cc cpu/sampler/sampler.cc - cpu/simple/cpu.cc cpu/trace/reader/mem_trace_reader.cc cpu/trace/reader/ibm_reader.cc cpu/trace/reader/itx_reader.cc @@ -118,41 +94,6 @@ base_sources = Split(''' cpu/trace/opt_cpu.cc cpu/trace/trace_cpu.cc - encumbered/cpu/full/bpred.cc - encumbered/cpu/full/commit.cc - encumbered/cpu/full/cpu.cc - encumbered/cpu/full/create_vector.cc - encumbered/cpu/full/cv_spec_state.cc - encumbered/cpu/full/dd_queue.cc - encumbered/cpu/full/dep_link.cc - encumbered/cpu/full/dispatch.cc - encumbered/cpu/full/dyn_inst.cc - encumbered/cpu/full/execute.cc - encumbered/cpu/full/fetch.cc - encumbered/cpu/full/floss_reasons.cc - encumbered/cpu/full/fu_pool.cc - encumbered/cpu/full/inst_fifo.cc - encumbered/cpu/full/instpipe.cc - encumbered/cpu/full/issue.cc - encumbered/cpu/full/ls_queue.cc - encumbered/cpu/full/machine_queue.cc - encumbered/cpu/full/pipetrace.cc - encumbered/cpu/full/readyq.cc - encumbered/cpu/full/reg_info.cc - encumbered/cpu/full/rob_station.cc - encumbered/cpu/full/spec_memory.cc - encumbered/cpu/full/spec_state.cc - encumbered/cpu/full/storebuffer.cc - encumbered/cpu/full/writeback.cc - encumbered/cpu/full/iq/iq_station.cc - encumbered/cpu/full/iq/iqueue.cc - encumbered/cpu/full/iq/segmented/chain_info.cc - encumbered/cpu/full/iq/segmented/chain_wire.cc - encumbered/cpu/full/iq/segmented/iq_seg.cc - encumbered/cpu/full/iq/segmented/iq_segmented.cc - encumbered/cpu/full/iq/segmented/seg_chain.cc - encumbered/cpu/full/iq/seznec/iq_seznec.cc - encumbered/cpu/full/iq/standard/iq_standard.cc encumbered/mem/functional/main.cc mem/base_hier.cc @@ -224,6 +165,45 @@ base_sources = Split(''' sim/trace_context.cc ''') +# Old FullCPU sources +full_cpu_sources = Split(''' + encumbered/cpu/full/bpred.cc + encumbered/cpu/full/commit.cc + encumbered/cpu/full/cpu.cc + encumbered/cpu/full/create_vector.cc + encumbered/cpu/full/cv_spec_state.cc + encumbered/cpu/full/dd_queue.cc + encumbered/cpu/full/dep_link.cc + encumbered/cpu/full/dispatch.cc + encumbered/cpu/full/dyn_inst.cc + encumbered/cpu/full/execute.cc + encumbered/cpu/full/fetch.cc + encumbered/cpu/full/floss_reasons.cc + encumbered/cpu/full/fu_pool.cc + encumbered/cpu/full/inst_fifo.cc + encumbered/cpu/full/instpipe.cc + encumbered/cpu/full/issue.cc + encumbered/cpu/full/ls_queue.cc + encumbered/cpu/full/machine_queue.cc + encumbered/cpu/full/pipetrace.cc + encumbered/cpu/full/readyq.cc + encumbered/cpu/full/reg_info.cc + encumbered/cpu/full/rob_station.cc + encumbered/cpu/full/spec_memory.cc + encumbered/cpu/full/spec_state.cc + encumbered/cpu/full/storebuffer.cc + encumbered/cpu/full/writeback.cc + encumbered/cpu/full/iq/iq_station.cc + encumbered/cpu/full/iq/iqueue.cc + encumbered/cpu/full/iq/segmented/chain_info.cc + encumbered/cpu/full/iq/segmented/chain_wire.cc + encumbered/cpu/full/iq/segmented/iq_seg.cc + encumbered/cpu/full/iq/segmented/iq_segmented.cc + encumbered/cpu/full/iq/segmented/seg_chain.cc + encumbered/cpu/full/iq/seznec/iq_seznec.cc + encumbered/cpu/full/iq/standard/iq_standard.cc + ''') + # MySql sources mysql_sources = Split(''' base/mysql.cc @@ -349,8 +329,16 @@ env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())]) arch_sources = SConscript('arch/SConscript', exports = 'env', duplicate = False) +cpu_sources = SConscript('cpu/SConscript', + exports = 'env', duplicate = False) + +# This is outside of cpu/SConscript since the source directory isn't +# underneath 'cpu'. +if 'FullCPU' in env['CPU_MODELS']: + cpu_sources += full_cpu_sources + # Set up complete list of sources based on configuration. -sources = base_sources + arch_sources +sources = base_sources + arch_sources + cpu_sources if env['FULL_SYSTEM']: sources += full_system_sources diff --git a/arch/SConscript b/arch/SConscript index 51f6cc023..d237b0b1f 100644 --- a/arch/SConscript +++ b/arch/SConscript @@ -108,26 +108,27 @@ env.Append(SCANNERS = iscan) # output from the ISA description (*.isa) files. # -# several files are generated from the ISA description -isa_desc_gen_files = Split(''' - decoder.cc - alpha_o3_exec.cc - fast_cpu_exec.cc - simple_cpu_exec.cc - full_cpu_exec.cc - decoder.hh - ''') - # Convert to File node to fix path isa_parser = File('isa_parser.py') +cpu_models_file = File('#m5/cpu/cpu_models.py') + +# This sucks in the defintions of the CpuModel objects. +execfile(cpu_models_file.srcnode().abspath) + +# Several files are generated from the ISA description. +# We always get the basic decoder and header file. +isa_desc_gen_files = Split('decoder.cc decoder.hh') +# We also get an execute file for each selected CPU model. +isa_desc_gen_files += [CpuModel.dict[cpu].filename + for cpu in env['CPU_MODELS']] # The emitter patches up the sources & targets to include the # autogenerated files as targets and isa parser itself as a source. def isa_desc_emitter(target, source, env): - return (isa_desc_gen_files, [isa_parser] + source) + return (isa_desc_gen_files, [isa_parser, cpu_models_file] + source) # Pieces are in place, so create the builder. -isa_desc_builder = Builder(action='${SOURCES[0]} ${SOURCES[1]} $TARGET.dir', +isa_desc_builder = Builder(action='$SOURCES $TARGET.dir $CPU_MODELS', source_scanner = iscan, emitter = isa_desc_emitter) diff --git a/arch/isa_parser.py b/arch/isa_parser.py index a2bf31a0c..6508ca02a 100755 --- a/arch/isa_parser.py +++ b/arch/isa_parser.py @@ -712,43 +712,6 @@ yacc.yacc() # ##################################################################### -################ -# CpuModel class -# -# The CpuModel class encapsulates everything we need to know about a -# particular CPU model. - -class CpuModel: - # List of all CPU models. Accessible as CpuModel.list. - list = [] - - # Constructor. Automatically adds models to CpuModel.list. - def __init__(self, name, filename, includes, strings): - self.name = name - self.filename = filename # filename for output exec code - self.includes = includes # include files needed in exec file - # The 'strings' dict holds all the per-CPU symbols we can - # substitute into templates etc. - self.strings = strings - # Add self to list. - CpuModel.list.append(self) - -# Define CPU models. The following lines should contain the only -# CPU-model-specific information in this file. Note that the ISA -# description itself should have *no* CPU-model-specific content. -CpuModel('SimpleCPU', 'simple_cpu_exec.cc', - '#include "cpu/simple/cpu.hh"', - { 'CPU_exec_context': 'SimpleCPU' }) -CpuModel('FastCPU', 'fast_cpu_exec.cc', - '#include "cpu/fast/cpu.hh"', - { 'CPU_exec_context': 'FastCPU' }) -CpuModel('FullCPU', 'full_cpu_exec.cc', - '#include "encumbered/cpu/full/dyn_inst.hh"', - { 'CPU_exec_context': 'DynInst' }) -CpuModel('AlphaFullCPU', 'alpha_o3_exec.cc', - '#include "cpu/o3/alpha_dyn_inst.hh"', - { 'CPU_exec_context': 'AlphaDynInst<AlphaSimpleImpl>' }) - # Expand template with CPU-specific references into a dictionary with # an entry for each CPU model name. The entry key is the model name # and the corresponding value is the template with the CPU-specific @@ -757,7 +720,7 @@ def expand_cpu_symbols_to_dict(template): # Protect '%'s that don't go with CPU-specific terms t = re.sub(r'%(?!\(CPU_)', '%%', template) result = {} - for cpu in CpuModel.list: + for cpu in cpu_models: result[cpu.name] = t % cpu.strings return result @@ -816,7 +779,7 @@ class GenCode: # concatenates all the individual strings in the operands. def __add__(self, other): exec_output = {} - for cpu in CpuModel.list: + for cpu in cpu_models: n = cpu.name exec_output[n] = self.exec_output[n] + other.exec_output[n] return GenCode(self.header_output + other.header_output, @@ -830,7 +793,7 @@ class GenCode: self.header_output = pre + self.header_output self.decoder_output = pre + self.decoder_output self.decode_block = pre + self.decode_block - for cpu in CpuModel.list: + for cpu in cpu_models: self.exec_output[cpu.name] = pre + self.exec_output[cpu.name] # Wrap the decode block in a pair of strings (e.g., 'case foo:' @@ -1789,7 +1752,7 @@ def parse_isa_desc(isa_desc_file, output_dir): update_if_needed(output_dir + '/decoder.cc', file_template % vars()) # generate per-cpu exec files - for cpu in CpuModel.list: + for cpu in cpu_models: includes = '#include "decoder.hh"\n' includes += cpu.includes global_output = global_code.exec_output[cpu.name] @@ -1798,6 +1761,12 @@ def parse_isa_desc(isa_desc_file, output_dir): update_if_needed(output_dir + '/' + cpu.filename, file_template % vars()) +# global list of CpuModel objects (see cpu_models.py) +cpu_models = [] + # Called as script: get args from command line. +# Args are: <path to cpu_models.py> <isa desc file> <output dir> <cpu models> if __name__ == '__main__': - parse_isa_desc(sys.argv[1], sys.argv[2]) + execfile(sys.argv[1]) # read in CpuModel definitions + cpu_models = [CpuModel.dict[cpu] for cpu in sys.argv[4:]] + parse_isa_desc(sys.argv[2], sys.argv[3]) diff --git a/build/SConstruct b/build/SConstruct index 38d404846..2d64afb3e 100644 --- a/build/SConstruct +++ b/build/SConstruct @@ -221,6 +221,9 @@ env = conf.Finish() # Define the universe of supported ISAs env['ALL_ISA_LIST'] = ['alpha', 'sparc', 'mips'] +# Define the universe of supported CPU models +env['ALL_CPU_LIST'] = ['SimpleCPU', 'FastCPU', 'FullCPU', 'AlphaFullCPU'] + # Sticky options get saved in the options file so they persist from # one invocation to the next (unless overridden, in which case the new # value becomes sticky). @@ -251,6 +254,12 @@ sticky_opts.AddOptions( # Non-sticky options only apply to the current build. nonsticky_opts = Options(args=ARGUMENTS) nonsticky_opts.AddOptions( + # This really should be a sticky option, but there's a bug in + # scons 0.96.1 that causes ListOptions not to be able to be + # restored from a saved option file. It looks like this is fixed + # in 0.96.9, but there's a different bug in that version that means we + # can't just upgrade. + ListOption('CPU_MODELS', 'CPU models', 'all', env['ALL_CPU_LIST']), BoolOption('update_ref', 'Update test reference outputs', False) ) diff --git a/cpu/SConscript b/cpu/SConscript new file mode 100644 index 000000000..dbe174660 --- /dev/null +++ b/cpu/SConscript @@ -0,0 +1,99 @@ +# -*- mode:python -*- + +# Copyright (c) 2006 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +import os +import os.path + +# Import build environment variable from SConstruct. +Import('env') + +models_db = File('cpu_models.py') +execfile(models_db.srcnode().abspath) + +exec_sig_template = ''' +virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0; +''' + +def gen_cpu_exec_signatures(target, source, env): + f = open(str(target[0]), 'w') + print >> f, ''' +#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ +#define __CPU_STATIC_INST_EXEC_SIGS_HH__ +''' + for cpu in env['CPU_MODELS']: + xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] + print >> f, exec_sig_template % xc_type + print >> f, ''' +#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ +''' + +env.Command('static_inst_exec_sigs.hh', models_db, gen_cpu_exec_signatures) + +sources = [] + +if 'SimpleCPU' in env['CPU_MODELS']: + sources += Split('simple/cpu.cc') + +if 'FastCPU' in env['CPU_MODELS']: + sources += Split('fast/cpu.cc') + +if 'AlphaFullCPU' in env['CPU_MODELS']: + sources += Split(''' + o3/2bit_local_pred.cc + o3/alpha_dyn_inst.cc + o3/alpha_cpu.cc + o3/alpha_cpu_builder.cc + o3/bpred_unit.cc + o3/btb.cc + o3/commit.cc + o3/decode.cc + o3/fetch.cc + o3/free_list.cc + o3/cpu.cc + o3/iew.cc + o3/inst_queue.cc + o3/ldstq.cc + o3/mem_dep_unit.cc + o3/ras.cc + o3/rename.cc + o3/rename_map.cc + o3/rob.cc + o3/sat_counter.cc + o3/store_set.cc + o3/tournament_pred.cc + ''') + +# FullCPU sources are included from m5/SConscript since they're not +# below this point in the file hierarchy. + +# Convert file names to SCons File objects. This takes care of the +# path relative to the top of the directory tree. +sources = [File(s) for s in sources] + +Return('sources') + diff --git a/cpu/cpu_models.py b/cpu/cpu_models.py new file mode 100644 index 000000000..675204e5b --- /dev/null +++ b/cpu/cpu_models.py @@ -0,0 +1,71 @@ +# Copyright (c) 2003-2006 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +################ +# CpuModel class +# +# The CpuModel class encapsulates everything the ISA parser needs to +# know about a particular CPU model. + +class CpuModel: + # Dict of available CPU model objects. Accessible as CpuModel.dict. + dict = {} + + # Constructor. Automatically adds models to CpuModel.dict. + def __init__(self, name, filename, includes, strings): + self.name = name + self.filename = filename # filename for output exec code + self.includes = includes # include files needed in exec file + # The 'strings' dict holds all the per-CPU symbols we can + # substitute into templates etc. + self.strings = strings + # Add self to dict + CpuModel.dict[name] = self + + +# +# Define CPU models. +# +# Parameters are: +# - name of model +# - filename for generated ISA execution file +# - includes needed for generated ISA execution file +# - substitution strings for ISA description templates +# + +CpuModel('SimpleCPU', 'simple_cpu_exec.cc', + '#include "cpu/simple/cpu.hh"', + { 'CPU_exec_context': 'SimpleCPU' }) +CpuModel('FastCPU', 'fast_cpu_exec.cc', + '#include "cpu/fast/cpu.hh"', + { 'CPU_exec_context': 'FastCPU' }) +CpuModel('FullCPU', 'full_cpu_exec.cc', + '#include "encumbered/cpu/full/dyn_inst.hh"', + { 'CPU_exec_context': 'DynInst' }) +CpuModel('AlphaFullCPU', 'alpha_o3_exec.cc', + '#include "cpu/o3/alpha_dyn_inst.hh"', + { 'CPU_exec_context': 'AlphaDynInst<AlphaSimpleImpl>' }) + diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 5106dcf06..a0287a2de 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -314,7 +314,11 @@ class StaticInst : public StaticInstBase delete cachedDisassembly; } -#include "static_inst_impl.hh" +/** + * The execute() signatures are auto-generated by scons based on the + * set of CPU models we are compiling in today. + */ +#include "cpu/static_inst_exec_sigs.hh" /** * Return the target address for a PC-relative branch. |