diff options
| -rw-r--r-- | src/arch/arm/insts/misc.cc | 12 | ||||
| -rw-r--r-- | src/arch/arm/insts/misc.hh | 17 | ||||
| -rw-r--r-- | src/arch/arm/isa/templates/misc.isa | 25 |
3 files changed, 54 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index 87d3d1796..a5a4e3b32 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -206,6 +206,18 @@ RegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string +RegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + std::stringstream ss; + printMnemonic(ss); + printReg(ss, dest); + ss << ", "; + printReg(ss, op1); + ccprintf(ss, ", #%d", imm); + return ss.str(); +} + +std::string RegRegImmImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh index 79cec5732..53281400e 100644 --- a/src/arch/arm/insts/misc.hh +++ b/src/arch/arm/insts/misc.hh @@ -189,6 +189,23 @@ class RegRegRegOp : public PredOp std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; +class RegRegImmOp : public PredOp +{ + protected: + IntRegIndex dest; + IntRegIndex op1; + uint64_t imm; + + RegRegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm) : + PredOp(mnem, _machInst, __opClass), + dest(_dest), op1(_op1), imm(_imm) + {} + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; +}; + class RegRegImmImmOp : public PredOp { protected: diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa index e880b03ec..6f782ba58 100644 --- a/src/arch/arm/isa/templates/misc.isa +++ b/src/arch/arm/isa/templates/misc.isa @@ -215,6 +215,31 @@ def template RegRegRegOpConstructor {{ } }}; +def template RegRegImmOpDeclare {{ +class %(class_name)s : public %(base_class)s +{ + protected: + public: + // Constructor + %(class_name)s(ExtMachInst machInst, + IntRegIndex _dest, IntRegIndex _op1, + uint64_t _imm); + %(BasicExecDeclare)s +}; +}}; + +def template RegRegImmOpConstructor {{ + inline %(class_name)s::%(class_name)s(ExtMachInst machInst, + IntRegIndex _dest, + IntRegIndex _op1, + uint64_t _imm) + : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, + _dest, _op1, _imm) + { + %(constructor)s; + } +}}; + def template RegRegImmImmOpDeclare {{ class %(class_name)s : public %(base_class)s { |