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-rw-r--r--configs/common/Caches.py1
-rw-r--r--src/sim/Root.py1
-rw-r--r--src/sim/System.py1
3 files changed, 1 insertions, 2 deletions
diff --git a/configs/common/Caches.py b/configs/common/Caches.py
index acaa0024e..926a41d07 100644
--- a/configs/common/Caches.py
+++ b/configs/common/Caches.py
@@ -38,6 +38,7 @@
#
# Authors: Lisa Hsu
+from m5.defines import buildEnv
from m5.objects import *
# Base implementations of L1, L2, IO and TLB-walker caches. There are
diff --git a/src/sim/Root.py b/src/sim/Root.py
index 776222b9c..e754a764c 100644
--- a/src/sim/Root.py
+++ b/src/sim/Root.py
@@ -29,7 +29,6 @@
# Authors: Nathan Binkert
from m5.SimObject import SimObject
-from m5.defines import buildEnv
from m5.params import *
from m5.util import fatal
diff --git a/src/sim/System.py b/src/sim/System.py
index 0d0251646..8ebf7a024 100644
--- a/src/sim/System.py
+++ b/src/sim/System.py
@@ -29,7 +29,6 @@
# Rick Strong
from m5.SimObject import SimObject
-from m5.defines import buildEnv
from m5.params import *
from m5.proxy import *