diff options
15 files changed, 158 insertions, 147 deletions
diff --git a/src/arch/x86/insts/micromediaop.hh b/src/arch/x86/insts/micromediaop.hh index 7f8e3a364..854d4de09 100644 --- a/src/arch/x86/insts/micromediaop.hh +++ b/src/arch/x86/insts/micromediaop.hh @@ -37,6 +37,7 @@ namespace X86ISA { enum MediaFlag { MediaMultHiOp = 1, + MediaSignedOp = 64, MediaScalarOp = 128 }; @@ -82,6 +83,12 @@ namespace X86ISA { return ext & MediaMultHiOp; } + + bool + signedOp() const + { + return ext & MediaSignedOp; + } }; class MediaOpReg : public MediaOpBase diff --git a/src/arch/x86/isa/insts/simd128/integer/arithmetic/addition.py b/src/arch/x86/isa/insts/simd128/integer/arithmetic/addition.py index 05e2b80d5..1e9856562 100644 --- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/addition.py +++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/addition.py @@ -135,43 +135,43 @@ def macroop PADDQ_XMM_P { }; def macroop PADDSB_XMM_XMM { - maddi xmml, xmml, xmmlm, size=1, ext=4 - maddi xmmh, xmmh, xmmhm, size=1, ext=4 + maddi xmml, xmml, xmmlm, size=1, ext = "2 |" + Signed + maddi xmmh, xmmh, xmmhm, size=1, ext = "2 |" + Signed }; def macroop PADDSB_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - maddi xmml, xmml, ufp1, size=1, ext=4 - maddi xmmh, xmmh, ufp2, size=1, ext=4 + maddi xmml, xmml, ufp1, size=1, ext = "2 |" + Signed + maddi xmmh, xmmh, ufp2, size=1, ext = "2 |" + Signed }; def macroop PADDSB_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - maddi xmml, xmml, ufp1, size=1, ext=4 - maddi xmmh, xmmh, ufp2, size=1, ext=4 + maddi xmml, xmml, ufp1, size=1, ext = "2 |" + Signed + maddi xmmh, xmmh, ufp2, size=1, ext = "2 |" + Signed }; def macroop PADDSW_XMM_XMM { - maddi xmml, xmml, xmmlm, size=2, ext=4 - maddi xmmh, xmmh, xmmhm, size=2, ext=4 + maddi xmml, xmml, xmmlm, size=2, ext = "2 |" + Signed + maddi xmmh, xmmh, xmmhm, size=2, ext = "2 |" + Signed }; def macroop PADDSW_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - maddi xmml, xmml, ufp1, size=2, ext=4 - maddi xmmh, xmmh, ufp2, size=2, ext=4 + maddi xmml, xmml, ufp1, size=2, ext = "2 |" + Signed + maddi xmmh, xmmh, ufp2, size=2, ext = "2 |" + Signed }; def macroop PADDSW_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - maddi xmml, xmml, ufp1, size=2, ext=4 - maddi xmmh, xmmh, ufp2, size=2, ext=4 + maddi xmml, xmml, ufp1, size=2, ext = "2 |" + Signed + maddi xmmh, xmmh, ufp2, size=2, ext = "2 |" + Signed }; def macroop PADDUSB_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py index 2715f5d25..904bf69f8 100644 --- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py +++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py @@ -55,43 +55,43 @@ microcode = ''' def macroop PMULHW_XMM_XMM { - mmuli xmml, xmml, xmmlm, size=2, ext = "0x2 |" + MultHi - mmuli xmmh, xmmh, xmmhm, size=2, ext = "0x2 |" + MultHi + mmuli xmml, xmml, xmmlm, size=2, ext = Signed + "|" + MultHi + mmuli xmmh, xmmh, xmmhm, size=2, ext = Signed + "|" + MultHi }; def macroop PMULHW_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - mmuli xmml, xmml, ufp1, size=2, ext = "0x2 |" + MultHi - mmuli xmmh, xmmh, ufp2, size=2, ext = "0x2 |" + MultHi + mmuli xmml, xmml, ufp1, size=2, ext = Signed + "|" + MultHi + mmuli xmmh, xmmh, ufp2, size=2, ext = Signed + "|" + MultHi }; def macroop PMULHW_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - mmuli xmml, xmml, ufp1, size=2, ext = "0x2 |" + MultHi - mmuli xmmh, xmmh, ufp2, size=2, ext = "0x2 |" + MultHi + mmuli xmml, xmml, ufp1, size=2, ext = Signed + "|" + MultHi + mmuli xmmh, xmmh, ufp2, size=2, ext = Signed + "|" + MultHi }; def macroop PMULLW_XMM_XMM { - mmuli xmml, xmml, xmmlm, size=2, ext=2 - mmuli xmmh, xmmh, xmmhm, size=2, ext=2 + mmuli xmml, xmml, xmmlm, size=2, ext=Signed + mmuli xmmh, xmmh, xmmhm, size=2, ext=Signed }; def macroop PMULLW_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - mmuli xmml, xmml, ufp1, size=2, ext=2 - mmuli xmmh, xmmh, ufp2, size=2, ext=2 + mmuli xmml, xmml, ufp1, size=2, ext=Signed + mmuli xmmh, xmmh, ufp2, size=2, ext=Signed }; def macroop PMULLW_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - mmuli xmml, xmml, ufp1, size=2, ext=2 - mmuli xmmh, xmmh, ufp2, size=2, ext=2 + mmuli xmml, xmml, ufp1, size=2, ext=Signed + mmuli xmmh, xmmh, ufp2, size=2, ext=Signed }; def macroop PMULHUW_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py index f157d165f..64ae05190 100644 --- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py +++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py @@ -55,22 +55,22 @@ microcode = ''' def macroop PMADDWD_XMM_XMM { - mmuli ufp3, xmml, xmmlm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmml, xmmlm, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmml, xmmlm, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmml, xmmlm, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmml, ufp3, ufp4, size=4, ext=0 - mmuli ufp3, xmmh, xmmhm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmmh, xmmhm, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmmh, xmmhm, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmmh, xmmhm, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmmh, ufp3, ufp4, size=4, ext=0 }; def macroop PMADDWD_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmml, ufp3, ufp4, size=4, ext=0 - mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmmh, ufp3, ufp4, size=4, ext=0 }; @@ -78,11 +78,11 @@ def macroop PMADDWD_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmml, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmml, ufp3, ufp4, size=4, ext=0 - mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, xmmh, ufp2, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi xmmh, ufp3, ufp4, size=4, ext=0 }; ''' diff --git a/src/arch/x86/isa/insts/simd128/integer/arithmetic/subtraction.py b/src/arch/x86/isa/insts/simd128/integer/arithmetic/subtraction.py index fdfb08667..d73434832 100644 --- a/src/arch/x86/isa/insts/simd128/integer/arithmetic/subtraction.py +++ b/src/arch/x86/isa/insts/simd128/integer/arithmetic/subtraction.py @@ -135,43 +135,43 @@ def macroop PSUBQ_XMM_P { }; def macroop PSUBSB_XMM_XMM { - msubi xmml, xmml, xmmlm, size=1, ext=4 - msubi xmmh, xmmh, xmmhm, size=1, ext=4 + msubi xmml, xmml, xmmlm, size=1, ext = "2 |" + Signed + msubi xmmh, xmmh, xmmhm, size=1, ext = "2 |" + Signed }; def macroop PSUBSB_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - msubi xmml, xmml, ufp1, size=1, ext=4 - msubi xmmh, xmmh, ufp2, size=1, ext=4 + msubi xmml, xmml, ufp1, size=1, ext = "2 |" + Signed + msubi xmmh, xmmh, ufp2, size=1, ext = "2 |" + Signed }; def macroop PSUBSB_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - msubi xmml, xmml, ufp1, size=1, ext=4 - msubi xmmh, xmmh, ufp2, size=1, ext=4 + msubi xmml, xmml, ufp1, size=1, ext = "2 |" + Signed + msubi xmmh, xmmh, ufp2, size=1, ext = "2 |" + Signed }; def macroop PSUBSW_XMM_XMM { - msubi xmml, xmml, xmmlm, size=2, ext=4 - msubi xmmh, xmmh, xmmhm, size=2, ext=4 + msubi xmml, xmml, xmmlm, size=2, ext = "2 |" + Signed + msubi xmmh, xmmh, xmmhm, size=2, ext = "2 |" + Signed }; def macroop PSUBSW_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - msubi xmml, xmml, ufp1, size=2, ext=4 - msubi xmmh, xmmh, ufp2, size=2, ext=4 + msubi xmml, xmml, ufp1, size=2, ext = "2 |" + Signed + msubi xmmh, xmmh, ufp2, size=2, ext = "2 |" + Signed }; def macroop PSUBSW_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - msubi xmml, xmml, ufp1, size=2, ext=4 - msubi xmmh, xmmh, ufp2, size=2, ext=4 + msubi xmml, xmml, ufp1, size=2, ext = "2 |" + Signed + msubi xmmh, xmmh, ufp2, size=2, ext = "2 |" + Signed }; def macroop PSUBUSB_XMM_XMM { diff --git a/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_minimum_or_maximum.py b/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_minimum_or_maximum.py index d3bfbb529..6610e0690 100644 --- a/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_minimum_or_maximum.py +++ b/src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_minimum_or_maximum.py @@ -75,23 +75,23 @@ def macroop PMINUB_XMM_P { }; def macroop PMINSW_XMM_XMM { - mmini xmml, xmml, xmmlm, size=2, ext=2 - mmini xmmh, xmmh, xmmhm, size=2, ext=2 + mmini xmml, xmml, xmmlm, size=2, ext=Signed + mmini xmmh, xmmh, xmmhm, size=2, ext=Signed }; def macroop PMINSW_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - mmini xmml, xmml, ufp1, size=2, ext=2 - mmini xmmh, xmmh, ufp2, size=2, ext=2 + mmini xmml, xmml, ufp1, size=2, ext=Signed + mmini xmmh, xmmh, ufp2, size=2, ext=Signed }; def macroop PMINSW_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - mmini xmml, xmml, ufp1, size=2, ext=2 - mmini xmmh, xmmh, ufp2, size=2, ext=2 + mmini xmml, xmml, ufp1, size=2, ext=Signed + mmini xmmh, xmmh, ufp2, size=2, ext=Signed }; def macroop PMAXUB_XMM_XMM { @@ -115,22 +115,22 @@ def macroop PMAXUB_XMM_P { }; def macroop PMAXSW_XMM_XMM { - mmaxi xmml, xmml, xmmlm, size=2, ext=2 - mmaxi xmmh, xmmh, xmmhm, size=2, ext=2 + mmaxi xmml, xmml, xmmlm, size=2, ext=Signed + mmaxi xmmh, xmmh, xmmhm, size=2, ext=Signed }; def macroop PMAXSW_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - mmaxi xmml, xmml, ufp1, size=2, ext=2 - mmaxi xmmh, xmmh, ufp2, size=2, ext=2 + mmaxi xmml, xmml, ufp1, size=2, ext=Signed + mmaxi xmmh, xmmh, ufp2, size=2, ext=Signed }; def macroop PMAXSW_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - mmaxi xmml, xmml, ufp1, size=2, ext=2 - mmaxi xmmh, xmmh, ufp2, size=2, ext=2 + mmaxi xmml, xmml, ufp1, size=2, ext=Signed + mmaxi xmmh, xmmh, ufp2, size=2, ext=Signed }; ''' diff --git a/src/arch/x86/isa/insts/simd128/integer/data_reordering/pack_with_saturation.py b/src/arch/x86/isa/insts/simd128/integer/data_reordering/pack_with_saturation.py index 9112a7382..7afee6cbf 100644 --- a/src/arch/x86/isa/insts/simd128/integer/data_reordering/pack_with_saturation.py +++ b/src/arch/x86/isa/insts/simd128/integer/data_reordering/pack_with_saturation.py @@ -55,45 +55,45 @@ microcode = ''' def macroop PACKSSDW_XMM_XMM { - pack ufp1, xmml, xmmh, ext=1, srcSize=4, destSize=2 - pack xmmh, xmmlm, xmmhm, ext=1, srcSize=4, destSize=2 + pack ufp1, xmml, xmmh, ext=Signed, srcSize=4, destSize=2 + pack xmmh, xmmlm, xmmhm, ext=Signed, srcSize=4, destSize=2 movfp xmml, ufp1, dataSize=8 }; def macroop PACKSSDW_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - pack xmml, xmml, xmmh, ext=1, srcSize=4, destSize=2 - pack xmmh, ufp1, ufp2, ext=1, srcSize=4, destSize=2 + pack xmml, xmml, xmmh, ext=Signed, srcSize=4, destSize=2 + pack xmmh, ufp1, ufp2, ext=Signed, srcSize=4, destSize=2 }; def macroop PACKSSDW_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - pack xmml, xmml, xmmh, ext=1, srcSize=4, destSize=2 - pack xmmh, ufp1, ufp2, ext=1, srcSize=4, destSize=2 + pack xmml, xmml, xmmh, ext=Signed, srcSize=4, destSize=2 + pack xmmh, ufp1, ufp2, ext=Signed, srcSize=4, destSize=2 }; def macroop PACKSSWB_XMM_XMM { - pack ufp1, xmml, xmmh, ext=1, srcSize=2, destSize=1 - pack xmmh, xmmlm, xmmhm, ext=1, srcSize=2, destSize=1 + pack ufp1, xmml, xmmh, ext=Signed, srcSize=2, destSize=1 + pack xmmh, xmmlm, xmmhm, ext=Signed, srcSize=2, destSize=1 movfp xmml, ufp1, dataSize=8 }; def macroop PACKSSWB_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - pack xmml, xmml, xmmh, ext=1, srcSize=2, destSize=1 - pack xmmh, ufp1, ufp2, ext=1, srcSize=2, destSize=1 + pack xmml, xmml, xmmh, ext=Signed, srcSize=2, destSize=1 + pack xmmh, ufp1, ufp2, ext=Signed, srcSize=2, destSize=1 }; def macroop PACKSSWB_XMM_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, riprel, "DISPLACEMENT + 8", dataSize=8 - pack xmml, xmml, xmmh, ext=1, srcSize=2, destSize=1 - pack xmmh, ufp1, ufp2, ext=1, srcSize=2, destSize=1 + pack xmml, xmml, xmmh, ext=Signed, srcSize=2, destSize=1 + pack xmmh, ufp1, ufp2, ext=Signed, srcSize=2, destSize=1 }; def macroop PACKUSWB_XMM_XMM { @@ -105,8 +105,8 @@ def macroop PACKUSWB_XMM_XMM { def macroop PACKUSWB_XMM_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 ldfp ufp2, seg, sib, "DISPLACEMENT + 8", dataSize=8 - pack xmml, xmml, xmmh, ext=0, srcSize=2, destSize=1 - pack xmmh, ufp1, ufp2, ext=0, srcSize=2, destSize=1 + pack xmml, xmml, xmmh, ext=Signed, srcSize=2, destSize=1 + pack xmmh, ufp1, ufp2, ext=Signed, srcSize=2, destSize=1 }; def macroop PACKUSWB_XMM_P { diff --git a/src/arch/x86/isa/insts/simd64/integer/arithmetic/addition.py b/src/arch/x86/isa/insts/simd64/integer/arithmetic/addition.py index b663d15b7..d376dccce 100644 --- a/src/arch/x86/isa/insts/simd64/integer/arithmetic/addition.py +++ b/src/arch/x86/isa/insts/simd64/integer/arithmetic/addition.py @@ -115,33 +115,33 @@ def macroop PADDQ_MMX_P { }; def macroop PADDSB_MMX_MMX { - maddi mmx, mmx, mmxm, size=1, ext=4 + maddi mmx, mmx, mmxm, size=1, ext = "2 |" + Signed }; def macroop PADDSB_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - maddi mmx, mmx, ufp1, size=1, ext=4 + maddi mmx, mmx, ufp1, size=1, ext = "2 |" + Signed }; def macroop PADDSB_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - maddi mmx, mmx, ufp1, size=1, ext=4 + maddi mmx, mmx, ufp1, size=1, ext = "2 |" + Signed }; def macroop PADDSW_MMX_MMX { - maddi mmx, mmx, mmxm, size=2, ext=4 + maddi mmx, mmx, mmxm, size=2, ext = "2 |" + Signed }; def macroop PADDSW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - maddi mmx, mmx, ufp1, size=2, ext=4 + maddi mmx, mmx, ufp1, size=2, ext = "2 |" + Signed }; def macroop PADDSW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - maddi mmx, mmx, ufp1, size=2, ext=4 + maddi mmx, mmx, ufp1, size=2, ext = "2 |" + Signed }; def macroop PADDUSB_MMX_MMX { diff --git a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py index 50a1e5dc0..526162e32 100644 --- a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py +++ b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiplication.py @@ -55,48 +55,48 @@ microcode = ''' def macroop PMULHW_MMX_MMX { - mmuli mmx, mmx, mmxm, size=2, ext = "0x2 |" + MultHi + mmuli mmx, mmx, mmxm, size=2, ext = Signed + "|" + MultHi }; def macroop PMULHW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmuli mmx, mmx, ufp1, size=2, ext = "0x2 |" + MultHi + mmuli mmx, mmx, ufp1, size=2, ext = Signed + "|" + MultHi }; def macroop PMULHW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmuli mmx, mmx, ufp1, size=2, ext = "0x2 |" + MultHi + mmuli mmx, mmx, ufp1, size=2, ext = Signed + "|" + MultHi }; def macroop PMULLW_MMX_MMX { - mmuli mmx, mmx, mmxm, size=2, ext=2 + mmuli mmx, mmx, mmxm, size=2, ext = Signed }; def macroop PMULLW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmuli mmx, mmx, ufp1, size=2, ext=2 + mmuli mmx, mmx, ufp1, size=2, ext = Signed }; def macroop PMULLW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmuli mmx, mmx, ufp1, size=2, ext=2 + mmuli mmx, mmx, ufp1, size=2, ext = Signed }; def macroop PMULHRW_MMX_MMX { - mmuli mmx, mmx, mmxm, size=2, ext = "0x2 | 0x4 |" + MultHi + mmuli mmx, mmx, mmxm, size=2, ext = Signed + "| 0x4 |" + MultHi }; def macroop PMULHRW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmuli mmx, mmx, ufp1, size=2, ext = "0x2 | 0x4 |" + MultHi + mmuli mmx, mmx, ufp1, size=2, ext = Signed + "| 0x4 |" + MultHi }; def macroop PMULHRW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmuli mmx, mmx, ufp1, size=2, ext = "0x2 | 0x4 |" + MultHi + mmuli mmx, mmx, ufp1, size=2, ext = Signed + "| 0x4 |" + MultHi }; def macroop PMULHUW_MMX_MMX { diff --git a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py index f6940d159..354cf8722 100644 --- a/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py +++ b/src/arch/x86/isa/insts/simd64/integer/arithmetic/multiply_add.py @@ -55,23 +55,23 @@ microcode = ''' def macroop PMADDWD_MMX_MMX { - mmuli ufp3, mmx, mmxm, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, mmx, mmxm, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, mmx, mmxm, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, mmx, mmxm, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi mmx, ufp3, ufp4, size=4, ext=0 }; def macroop PMADDWD_MMX_M { ldfp ufp1, seg, sib, "DISPLACEMENT", dataSize=8 - mmuli ufp3, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, mmx, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, mmx, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi mmx, ufp3, ufp4, size=4, ext=0 }; def macroop PMADDWD_MMX_P { rdip t7 ldfp ufp1, seg, riprel, "DISPLACEMENT", dataSize=8 - mmuli ufp3, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10 | 0x20) - mmuli ufp4, mmx, ufp1, srcSize=2, destSize=4, ext=(0x2 | 0x10) + mmuli ufp3, mmx, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10 | 0x20" + mmuli ufp4, mmx, ufp1, srcSize=2, destSize=4, ext = Signed + "| 0x10" maddi mmx, ufp3, ufp4, size=4, ext=0 }; ''' diff --git a/src/arch/x86/isa/insts/simd64/integer/arithmetic/subtraction.py b/src/arch/x86/isa/insts/simd64/integer/arithmetic/subtraction.py index a60c0b1a8..4ee87e0f8 100644 --- a/src/arch/x86/isa/insts/simd64/integer/arithmetic/subtraction.py +++ b/src/arch/x86/isa/insts/simd64/integer/arithmetic/subtraction.py @@ -115,33 +115,33 @@ def macroop PSUBQ_MMX_P { }; def macroop PSUBSB_MMX_MMX { - msubi mmx, mmx, mmxm, size=1, ext=4 + msubi mmx, mmx, mmxm, size=1, ext = "2 |" + Signed }; def macroop PSUBSB_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - msubi mmx, mmx, ufp1, size=1, ext=4 + msubi mmx, mmx, ufp1, size=1, ext = "2 |" + Signed }; def macroop PSUBSB_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - msubi mmx, mmx, ufp1, size=1, ext=4 + msubi mmx, mmx, ufp1, size=1, ext = "2 |" + Signed }; def macroop PSUBSW_MMX_MMX { - msubi mmx, mmx, mmxm, size=2, ext=4 + msubi mmx, mmx, mmxm, size=2, ext = "2 |" + Signed }; def macroop PSUBSW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - msubi mmx, mmx, ufp1, size=2, ext=4 + msubi mmx, mmx, ufp1, size=2, ext = "2 |" + Signed }; def macroop PSUBSW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - msubi mmx, mmx, ufp1, size=2, ext=4 + msubi mmx, mmx, ufp1, size=2, ext = "2 |" + Signed }; def macroop PSUBUSB_MMX_MMX { diff --git a/src/arch/x86/isa/insts/simd64/integer/compare/compare_and_write_minimum_or_maximum.py b/src/arch/x86/isa/insts/simd64/integer/compare/compare_and_write_minimum_or_maximum.py index 8d8247300..c2eedbb0e 100644 --- a/src/arch/x86/isa/insts/simd64/integer/compare/compare_and_write_minimum_or_maximum.py +++ b/src/arch/x86/isa/insts/simd64/integer/compare/compare_and_write_minimum_or_maximum.py @@ -70,18 +70,18 @@ def macroop PMINUB_MMX_P { }; def macroop PMINSW_MMX_MMX { - mmini mmx, mmx, mmxm, size=2, ext=2 + mmini mmx, mmx, mmxm, size=2, ext=Signed }; def macroop PMINSW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmini mmx, mmx, ufp1, size=2, ext=2 + mmini mmx, mmx, ufp1, size=2, ext=Signed }; def macroop PMINSW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmini mmx, mmx, ufp1, size=2, ext=2 + mmini mmx, mmx, ufp1, size=2, ext=Signed }; def macroop PMAXUB_MMX_MMX { @@ -100,17 +100,17 @@ def macroop PMAXUB_MMX_P { }; def macroop PMAXSW_MMX_MMX { - mmaxi mmx, mmx, mmxm, size=2, ext=2 + mmaxi mmx, mmx, mmxm, size=2, ext=Signed }; def macroop PMAXSW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - mmaxi mmx, mmx, ufp1, size=2, ext=2 + mmaxi mmx, mmx, ufp1, size=2, ext=Signed }; def macroop PMAXSW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - mmaxi mmx, mmx, ufp1, size=2, ext=2 + mmaxi mmx, mmx, ufp1, size=2, ext=Signed }; ''' diff --git a/src/arch/x86/isa/insts/simd64/integer/data_reordering/pack_with_saturation.py b/src/arch/x86/isa/insts/simd64/integer/data_reordering/pack_with_saturation.py index 4235d7f26..cb8b4eaa7 100644 --- a/src/arch/x86/isa/insts/simd64/integer/data_reordering/pack_with_saturation.py +++ b/src/arch/x86/isa/insts/simd64/integer/data_reordering/pack_with_saturation.py @@ -55,33 +55,33 @@ microcode = ''' def macroop PACKSSDW_MMX_MMX { - pack mmx, mmx, mmxm, ext=1, srcSize=4, destSize=2 + pack mmx, mmx, mmxm, ext=Signed, srcSize=4, destSize=2 }; def macroop PACKSSDW_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - pack mmx, mmx, ufp1, ext=1, srcSize=4, destSize=2 + pack mmx, mmx, ufp1, ext=Signed, srcSize=4, destSize=2 }; def macroop PACKSSDW_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - pack mmx, mmx, ufp1, ext=1, srcSize=4, destSize=2 + pack mmx, mmx, ufp1, ext=Signed, srcSize=4, destSize=2 }; def macroop PACKSSWB_MMX_MMX { - pack mmx, mmx, mmxm, ext=1, srcSize=2, destSize=1 + pack mmx, mmx, mmxm, ext=Signed, srcSize=2, destSize=1 }; def macroop PACKSSWB_MMX_M { ldfp ufp1, seg, sib, disp, dataSize=8 - pack mmx, mmx, ufp1, ext=1, srcSize=2, destSize=1 + pack mmx, mmx, ufp1, ext=Signed, srcSize=2, destSize=1 }; def macroop PACKSSWB_MMX_P { rdip t7 ldfp ufp1, seg, riprel, disp, dataSize=8 - pack mmx, mmx, ufp1, ext=1, srcSize=2, destSize=1 + pack mmx, mmx, ufp1, ext=Signed, srcSize=2, destSize=1 }; def macroop PACKUSWB_MMX_MMX { diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index e48ad3d69..b0b557521 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -181,7 +181,7 @@ let {{ 'kernel_gs_base'): assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper()) - for flag in ('Scalar', 'MultHi'): + for flag in ('Scalar', 'MultHi', 'Signed'): assembler.symbols[flag] = 'Media%sOp' % flag # Code literal which forces a default 64 bit operand size in 64 bit mode. diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa index 84d2d7f70..900c166f8 100644 --- a/src/arch/x86/isa/microops/mediaop.isa +++ b/src/arch/x86/isa/microops/mediaop.isa @@ -451,14 +451,14 @@ let {{ // Handle saturation. if (signBit) { if (overflow != mask(destBits - srcBits + 1)) { - if (ext & 0x1) + if (signedOp()) picked = (ULL(1) << (destBits - 1)); else picked = 0; } } else { if (overflow != 0) { - if (ext & 0x1) + if (signedOp()) picked = mask(destBits - 1); else picked = mask(destBits); @@ -479,14 +479,14 @@ let {{ // Handle saturation. if (signBit) { if (overflow != mask(destBits - srcBits + 1)) { - if (ext & 0x1) + if (signedOp()) picked = (ULL(1) << (destBits - 1)); else picked = 0; } } else { if (overflow != 0) { - if (ext & 0x1) + if (signedOp()) picked = mask(destBits - 1); else picked = mask(destBits); @@ -648,7 +648,7 @@ let {{ (0 - (arg2Bits & (ULL(1) << (sizeBits - 1)))); uint64_t resBits; - if (ext & 0x2) { + if (signedOp()) { if (arg1 < arg2) { resBits = arg1Bits; } else { @@ -686,7 +686,7 @@ let {{ (0 - (arg2Bits & (ULL(1) << (sizeBits - 1)))); uint64_t resBits; - if (ext & 0x2) { + if (signedOp()) { if (arg1 > arg2) { resBits = arg1Bits; } else { @@ -949,17 +949,19 @@ let {{ uint64_t resBits = arg1Bits + arg2Bits; if (ext & 0x2) { - if (findCarry(sizeBits, resBits, arg1Bits, arg2Bits)) - resBits = mask(sizeBits); - } else if (ext & 0x4) { - int arg1Sign = bits(arg1Bits, sizeBits - 1); - int arg2Sign = bits(arg2Bits, sizeBits - 1); - int resSign = bits(resBits, sizeBits - 1); - if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) { - if (resSign == 0) - resBits = (ULL(1) << (sizeBits - 1)); - else - resBits = mask(sizeBits - 1); + if (signedOp()) { + int arg1Sign = bits(arg1Bits, sizeBits - 1); + int arg2Sign = bits(arg2Bits, sizeBits - 1); + int resSign = bits(resBits, sizeBits - 1); + if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) { + if (resSign == 0) + resBits = (ULL(1) << (sizeBits - 1)); + else + resBits = mask(sizeBits - 1); + } + } else { + if (findCarry(sizeBits, resBits, arg1Bits, arg2Bits)) + resBits = mask(sizeBits); } } @@ -984,21 +986,23 @@ let {{ uint64_t resBits = arg1Bits - arg2Bits; if (ext & 0x2) { - if (arg2Bits > arg1Bits) { - resBits = 0; - } else if (!findCarry(sizeBits, resBits, - arg1Bits, ~arg2Bits)) { - resBits = mask(sizeBits); - } - } else if (ext & 0x4) { - int arg1Sign = bits(arg1Bits, sizeBits - 1); - int arg2Sign = !bits(arg2Bits, sizeBits - 1); - int resSign = bits(resBits, sizeBits - 1); - if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) { - if (resSign == 0) - resBits = (ULL(1) << (sizeBits - 1)); - else - resBits = mask(sizeBits - 1); + if (signedOp()) { + int arg1Sign = bits(arg1Bits, sizeBits - 1); + int arg2Sign = !bits(arg2Bits, sizeBits - 1); + int resSign = bits(resBits, sizeBits - 1); + if ((arg1Sign == arg2Sign) && (arg1Sign != resSign)) { + if (resSign == 0) + resBits = (ULL(1) << (sizeBits - 1)); + else + resBits = mask(sizeBits - 1); + } + } else { + if (arg2Bits > arg1Bits) { + resBits = 0; + } else if (!findCarry(sizeBits, resBits, + arg1Bits, ~arg2Bits)) { + resBits = mask(sizeBits); + } } } @@ -1030,7 +1034,7 @@ let {{ uint64_t arg2Bits = bits(FpSrcReg2.uqw, srcHiIndex, srcLoIndex); uint64_t resBits; - if (ext & 0x2) { + if (signedOp()) { int64_t arg1 = arg1Bits | (0 - (arg1Bits & (ULL(1) << (srcBits - 1)))); int64_t arg2 = arg2Bits | |