diff options
| -rw-r--r-- | src/arch/arm/isa/formats/misc.isa | 3 | ||||
| -rw-r--r-- | src/arch/arm/miscregs.hh | 6 |
2 files changed, 6 insertions, 3 deletions
diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index e966fe423..33a8ae4fe 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -110,6 +110,9 @@ def format McrMrc15() {{ case MISCREG_CP15DMB: return new WarnUnimplemented( isRead ? "mrc cp15dmb" : "mcr cp15dmb", machInst); + case MISCREG_ICIALLUIS: + return new WarnUnimplemented( + isRead ? "mrc icialluis" : "mcr icialluis", machInst); default: if (isRead) { return new Mrc15(machInst, rt, (IntRegIndex)miscReg); diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh index f6b8c2df9..e51f0ddd6 100644 --- a/src/arch/arm/miscregs.hh +++ b/src/arch/arm/miscregs.hh @@ -93,6 +93,7 @@ namespace ArmISA MISCREG_CP15DMB, MISCREG_CPACR, MISCREG_CLIDR, + MISCREG_ICIALLUIS, MISCREG_CP15_UNIMP_START, MISCREG_CTR = MISCREG_CP15_UNIMP_START, MISCREG_TCMTR, @@ -130,7 +131,6 @@ namespace ArmISA MISCREG_DRACR, MISCREG_IRACR, MISCREG_RGNR, - MISCREG_ICIALLUIS, MISCREG_BPIALLIS, MISCREG_ICIALLU, MISCREG_ICIMVAU, @@ -160,7 +160,7 @@ namespace ArmISA "fpsr", "fpsid", "fpscr", "fpexc", "sctlr", "dccisw", "dccimvac", "contextidr", "tpidrurw", "tpidruro", "tpidrprw", - "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", + "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", "icialluis", "ctr", "tcmtr", "mpuir", "mpidr", "midr", "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0", "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3", @@ -168,7 +168,7 @@ namespace ArmISA "ccsidr", "aidr", "csselr", "actlr", "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar", "drbar", "irbar", "drsr", "irsr", "dracr", "iracr", - "rgnr", "icialluis", "bpiallis", "iciallu", "icimvau", + "rgnr", "bpiallis", "iciallu", "icimvau", "bpiall", "bpimva", "dcimvac", "dcisw", "dccmvac", "mccsw", "dccmvau", "nop", "raz" |