diff options
| -rw-r--r-- | SConstruct | 2 | ||||
| -rw-r--r-- | src/cpu/o3/cpu.cc | 8 | ||||
| -rwxr-xr-x | src/cpu/o3/thread_context.hh | 2 | ||||
| -rwxr-xr-x | src/cpu/o3/thread_context_impl.hh | 6 | ||||
| -rw-r--r-- | src/cpu/simple/atomic.cc | 10 | ||||
| -rw-r--r-- | src/cpu/simple/timing.cc | 10 | ||||
| -rw-r--r-- | src/cpu/thread_context.hh | 4 | ||||
| -rw-r--r-- | src/cpu/thread_state.cc | 16 | ||||
| -rw-r--r-- | src/cpu/thread_state.hh | 6 |
9 files changed, 42 insertions, 22 deletions
diff --git a/SConstruct b/SConstruct index d8851f091..50ca2d6e4 100644 --- a/SConstruct +++ b/SConstruct @@ -344,7 +344,7 @@ sticky_opts.AddOptions( # values (more than one value) not to be able to be restored from # a saved option file. If this causes trouble then upgrade to # scons 0.96.90 or later. - ListOption('CPU_MODELS', 'CPU models', 'AtomicSimpleCPU,TimingSimpleCPU', + ListOption('CPU_MODELS', 'CPU models', 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU', env['ALL_CPU_LIST']), BoolOption('ALPHA_TLASER', 'Model Alpha TurboLaser platform (vs. Tsunami)', False), diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 3dc353a9f..a5a00015f 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -497,8 +497,6 @@ FullO3CPU<Impl>::init() } #if FULL_SYSTEM - src_tc->init(); - TheISA::initCPU(src_tc, src_tc->readCpuId()); #endif } @@ -554,6 +552,12 @@ template <class Impl> void FullO3CPU<Impl>::activateContext(int tid, int delay) { +#if FULL_SYSTEM + // Connect the ThreadContext's memory ports (Functional/Virtual + // Ports) + threadContexts[tid]->connectMemPorts(); +#endif + // Needs to set each stage to running as well. if (delay){ DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate " diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index 031f36480..390569c3d 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -92,7 +92,7 @@ class O3ThreadContext : public ThreadContext void delVirtPort(VirtualPort *vp); - virtual void init() { thread->init(); } + virtual void connectMemPorts() { thread->connectMemPorts(); } #else virtual TranslatingPort *getMemPort() { return thread->getMemPort(); } diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index 0180756e3..afebf294f 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -101,8 +101,10 @@ template <class Impl> void O3ThreadContext<Impl>::delVirtPort(VirtualPort *vp) { - delete vp->getPeer(); - delete vp; + if (vp != thread->getVirtPort()) { + delete vp->getPeer(); + delete vp; + } } #endif diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index cd335e36d..8cfe2ee83 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -77,9 +77,6 @@ AtomicSimpleCPU::init() for (int i = 0; i < threadContexts.size(); ++i) { ThreadContext *tc = threadContexts[i]; - // initialize the mem pointers - tc->init(); - // initialize CPU, including PC TheISA::initCPU(tc, tc->readCpuId()); } @@ -240,6 +237,13 @@ AtomicSimpleCPU::activateContext(int thread_num, int delay) assert(!tickEvent.scheduled()); notIdleFraction++; + +#if FULL_SYSTEM + // Connect the ThreadContext's memory ports (Functional/Virtual + // Ports) + tc->connectMemPorts(); +#endif + //Make sure ticks are still on multiples of cycles tickEvent.schedule(nextCycle(curTick + cycles(delay))); _status = Running; diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index aa23a00e8..dfffb0b1f 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -59,9 +59,6 @@ TimingSimpleCPU::init() for (int i = 0; i < threadContexts.size(); ++i) { ThreadContext *tc = threadContexts[i]; - // initialize the mem pointers - tc->init(); - // initialize CPU, including PC TheISA::initCPU(tc, tc->readCpuId()); } @@ -241,6 +238,13 @@ TimingSimpleCPU::activateContext(int thread_num, int delay) notIdleFraction++; _status = Running; + +#if FULL_SYSTEM + // Connect the ThreadContext's memory ports (Functional/Virtual + // Ports) + tc->connectMemPorts(); +#endif + // kick things off by initiating the fetch of the next instruction fetchEvent = new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, false); diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh index baeb7a8be..bb9cc9e16 100644 --- a/src/cpu/thread_context.hh +++ b/src/cpu/thread_context.hh @@ -134,7 +134,7 @@ class ThreadContext virtual void delVirtPort(VirtualPort *vp) = 0; - virtual void init() = 0; + virtual void connectMemPorts() = 0; #else virtual TranslatingPort *getMemPort() = 0; @@ -308,7 +308,7 @@ class ProxyThreadContext : public ThreadContext void delVirtPort(VirtualPort *vp) { return actualTC->delVirtPort(vp); } - void init() {actualTC->init(); } + void connectMemPorts() { actualTC->connectMemPorts(); } #else TranslatingPort *getMemPort() { return actualTC->getMemPort(); } diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc index 9cac4fd26..93dd1e2eb 100644 --- a/src/cpu/thread_state.cc +++ b/src/cpu/thread_state.cc @@ -113,23 +113,29 @@ ThreadState::unserialize(Checkpoint *cp, const std::string §ion) #if FULL_SYSTEM void -ThreadState::init() +ThreadState::connectMemPorts() { - initPhysPort(); - initVirtPort(); + connectPhysPort(); + connectVirtPort(); } void -ThreadState::initPhysPort() +ThreadState::connectPhysPort() { + // @todo: For now this disregards any older port that may have + // already existed. Fix this memory leak once the bus port IDs + // for functional ports is resolved. physPort = new FunctionalPort(csprintf("%s-%d-funcport", baseCpu->name(), tid)); connectToMemFunc(physPort); } void -ThreadState::initVirtPort() +ThreadState::connectVirtPort() { + // @todo: For now this disregards any older port that may have + // already existed. Fix this memory leak once the bus port IDs + // for functional ports is resolved. virtPort = new VirtualPort(csprintf("%s-%d-vport", baseCpu->name(), tid)); connectToMemFunc(virtPort); diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh index 1844be8b7..4f878db1f 100644 --- a/src/cpu/thread_state.hh +++ b/src/cpu/thread_state.hh @@ -91,11 +91,11 @@ struct ThreadState { Tick readLastSuspend() { return lastSuspend; } #if FULL_SYSTEM - void init(); + void connectMemPorts(); - void initPhysPort(); + void connectPhysPort(); - void initVirtPort(); + void connectVirtPort(); void dumpFuncProfile(); |