diff options
| -rw-r--r-- | src/cpu/checker/cpu.cc | 4 | ||||
| -rw-r--r-- | src/cpu/ozone/lw_lsq_impl.hh | 6 | ||||
| -rw-r--r-- | src/cpu/simple/atomic.cc | 2 | ||||
| -rw-r--r-- | src/mem/physical.cc | 20 |
4 files changed, 15 insertions, 17 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc index d6cd9409b..a6af98d66 100644 --- a/src/cpu/checker/cpu.cc +++ b/src/cpu/checker/cpu.cc @@ -244,7 +244,7 @@ CheckerCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) !(unverifiedReq->isUncacheable()) && (!(unverifiedReq->isLocked()) || ((unverifiedReq->isLocked()) && - unverifiedReq->getScResult() == 1))) { + unverifiedReq->getExtraData() == 1))) { T inst_data; /* // This code would work if the LSQ allowed for snooping. @@ -269,7 +269,7 @@ CheckerCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) // doesn't check if the SC should succeed or fail, it just checks the // value. if (res && unverifiedReq->scResultValid()) - *res = unverifiedReq->getScResult(); + *res = unverifiedReq->getExtraData(); return NoFault; } diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh index ee1968626..f26b06453 100644 --- a/src/cpu/ozone/lw_lsq_impl.hh +++ b/src/cpu/ozone/lw_lsq_impl.hh @@ -605,12 +605,12 @@ OzoneLWLSQ<Impl>::writebackStores() // @todo: Remove this SC hack once the memory system handles it. if (req->isLocked()) { if (req->isUncacheable()) { - req->setScResult(2); + req->setExtraData(2); } else { if (cpu->lockFlag) { - req->setScResult(1); + req->setExtraData(1); } else { - req->setScResult(0); + req->setExtraData(0); // Hack: Instantly complete this store. completeDataAccess(data_pkt); --sq_it; diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 072867536..3001241fe 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -422,7 +422,7 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) assert(res); *res = pkt->get<T>(); } else if (res) { - *res = req->getScResult(); + *res = req->getExtraData(); } } diff --git a/src/mem/physical.cc b/src/mem/physical.cc index 381669d4d..5d7d7382a 100644 --- a/src/mem/physical.cc +++ b/src/mem/physical.cc @@ -265,33 +265,31 @@ PhysicalMemory::doFunctionalAccess(PacketPtr pkt) bool overwrite_mem; uint64_t condition_val64; uint32_t condition_val32; - uint64_t test_val64; - uint32_t test_val32; assert(sizeof(IntReg) >= pkt->getSize()); overwrite_mem = true; // keep a copy of our possible write value, and copy what is at the // memory address into the packet - memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize()); - memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(), + std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize()); + std::memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(), pkt->getSize()); if (pkt->req->isCondSwap()) { if (pkt->getSize() == sizeof(uint64_t)) { - condition_val64 = htog(pkt->req->getExtraData()); - memcpy(&test_val64, pmemAddr + pkt->getAddr() - start(), sizeof(uint64_t)); - overwrite_mem = test_val64 == condition_val64; + condition_val64 = pkt->req->getExtraData(); + overwrite_mem = !std::memcmp(&condition_val64, pmemAddr + + pkt->getAddr() - start(), sizeof(uint64_t)); } else if (pkt->getSize() == sizeof(uint32_t)) { - condition_val32 = htog((uint32_t)pkt->req->getExtraData()); - memcpy(&test_val32, pmemAddr + pkt->getAddr() - start(), sizeof(uint32_t)); - overwrite_mem = test_val32 == condition_val32; + condition_val32 = (uint32_t)pkt->req->getExtraData(); + overwrite_mem = !std::memcmp(&condition_val32, pmemAddr + + pkt->getAddr() - start(), sizeof(uint32_t)); } else panic("Invalid size for conditional read/write\n"); } if (overwrite_mem) - memcpy(pmemAddr + pkt->getAddr() - start(), + std::memcpy(pmemAddr + pkt->getAddr() - start(), &overwrite_val, pkt->getSize()); #if TRACING_ON |