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Diffstat (limited to 'configs/example/memtest.py')
| -rw-r--r-- | configs/example/memtest.py | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/configs/example/memtest.py b/configs/example/memtest.py index a74f4b2f3..65f3ec315 100644 --- a/configs/example/memtest.py +++ b/configs/example/memtest.py @@ -109,7 +109,7 @@ if len(treespec) < 1: sys.exit(1) # define prototype L1 cache -proto_l1 = BaseCache(size = '32kB', assoc = 4, block_size = block_size, +proto_l1 = BaseCache(size = '32kB', assoc = 4, hit_latency = '1ns', response_latency = '1ns', tgts_per_mshr = 8) @@ -143,7 +143,8 @@ for scale in treespec[:-2]: # system simulated system = System(funcmem = SimpleMemory(in_addr_map = False), funcbus = NoncoherentBus(), - physmem = SimpleMemory(latency = "100ns")) + physmem = SimpleMemory(latency = "100ns"), + cache_line_size = block_size) system.clk_domain = SrcClockDomain(clock = options.sys_clock) def make_level(spec, prototypes, attach_obj, attach_port): |