diff options
Diffstat (limited to 'src/cpu/checker/cpu.cc')
| -rw-r--r-- | src/cpu/checker/cpu.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc index f91bad294..d6a8bd032 100644 --- a/src/cpu/checker/cpu.cc +++ b/src/cpu/checker/cpu.cc @@ -154,8 +154,8 @@ CheckerCPU::readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags) // Need to account for multiple accesses like the Atomic and TimingSimple while (1) { - memReq = new Request(); - memReq->setVirt(0, addr, size, flags, masterId, thread->pcState().instAddr()); + memReq = new Request(0, addr, size, flags, masterId, + thread->pcState().instAddr(), tc->contextId(), 0); // translate to physical address fault = dtb->translateFunctional(memReq, tc, BaseTLB::Read); @@ -242,8 +242,8 @@ CheckerCPU::writeMem(uint8_t *data, unsigned size, // Need to account for a multiple access like Atomic and Timing CPUs while (1) { - memReq = new Request(); - memReq->setVirt(0, addr, size, flags, masterId, thread->pcState().instAddr()); + memReq = new Request(0, addr, size, flags, masterId, + thread->pcState().instAddr(), tc->contextId(), 0); // translate to physical address fault = dtb->translateFunctional(memReq, tc, BaseTLB::Write); |