1 files changed, 13 insertions, 0 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 819495d62..94fc5cdf3 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -442,6 +442,12 @@ FullO3CPU<Impl>::regStats()
               "to idling")
         .prereq(idleCycles);
 
+    quiesceCycles
+        .name(name() + ".quiesceCycles")
+        .desc("Total number of cycles that CPU has spent quiesced or waiting "
+              "for an interrupt")
+        .prereq(quiesceCycles);
+
     // Number of Instructions simulated
     // --------------------------------
     // Should probably be in Base CPU but need templated
@@ -688,6 +694,8 @@ FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
         activityRec.activity();
         fetch.wakeFromQuiesce();
 
+        quiesceCycles += tickToCycles((curTick() - 1) - lastRunningCycle);
+
         lastActivatedCycle = curTick();
 
         _status = Running;
@@ -722,6 +730,9 @@ FullO3CPU<Impl>::suspendContext(ThreadID tid)
     if ((activeThreads.size() == 1 && !deallocated) ||
         activeThreads.size() == 0)
         unscheduleTickEvent();
+
+    DPRINTF(Quiesce, "Suspending Context\n");
+    lastRunningCycle = curTick();
     _status = Idle;
 }
 
@@ -1205,6 +1216,8 @@ FullO3CPU<Impl>::takeOverFrom(BaseCPU *oldCPU)
     }
     if (!tickEvent.scheduled())
         schedule(tickEvent, nextCycle());
+
+    lastRunningCycle = curTick();
 }
 
 template <class Impl>