summaryrefslogtreecommitdiff
path: root/src/cpu/o3/lsq_unit.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/o3/lsq_unit.hh')
-rw-r--r--src/cpu/o3/lsq_unit.hh7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index cfb9b8288..f90f72ced 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -61,7 +61,6 @@
#include "debug/LSQUnit.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
-#include "sim/fault_fwd.hh"
struct DerivO3CPUParams;
@@ -578,9 +577,9 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh,
delete sreqLow;
delete sreqHigh;
}
- return new GenericISA::M5PanicFault(
- "Uncachable load [sn:%llx] PC %s\n",
- load_inst->seqNum, load_inst->pcState());
+ return std::make_shared<GenericISA::M5PanicFault>(
+ "Uncachable load [sn:%llx] PC %s\n",
+ load_inst->seqNum, load_inst->pcState());
}
// Check the SQ for any previous stores that might lead to forwarding