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-rw-r--r--src/cpu/o3/commit_impl.hh4
-rw-r--r--src/cpu/o3/fetch_impl.hh2
-rw-r--r--src/cpu/o3/lsq_impl.hh6
-rw-r--r--src/cpu/o3/rename_map.cc4
4 files changed, 8 insertions, 8 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 9e7dd65df..9225f525f 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -118,7 +118,7 @@ DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params)
if (policy == "aggressive"){
commitPolicy = Aggressive;
- DPRINTF(Commit,"Commit Policy set to Aggressive.");
+ DPRINTF(Commit,"Commit Policy set to Aggressive.\n");
} else if (policy == "roundrobin"){
commitPolicy = RoundRobin;
@@ -127,7 +127,7 @@ DefaultCommit<Impl>::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params)
priority_list.push_back(tid);
}
- DPRINTF(Commit,"Commit Policy set to Round Robin.");
+ DPRINTF(Commit,"Commit Policy set to Round Robin.\n");
} else if (policy == "oldestready"){
commitPolicy = OldestReady;
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index d3a2fc83f..8b1797f11 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -90,7 +90,7 @@ void
DefaultFetch<Impl>::IcachePort::recvFunctional(PacketPtr pkt)
{
DPRINTF(Fetch, "DefaultFetch doesn't update its state from a "
- "functional call.");
+ "functional call.\n");
}
template<class Impl>
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 8dd240557..41b0f3041 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -65,7 +65,7 @@ template <class Impl>
void
LSQ<Impl>::DcachePort::recvFunctional(PacketPtr pkt)
{
- DPRINTF(LSQ, "LSQ doesn't update things on a recvFunctional.");
+ DPRINTF(LSQ, "LSQ doesn't update things on a recvFunctional.\n");
}
template <class Impl>
@@ -151,7 +151,7 @@ LSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
maxSQEntries = SQEntries / numThreads;
DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: "
- "%i entries per LQ | %i entries per SQ",
+ "%i entries per LQ | %i entries per SQ\n",
maxLQEntries,maxSQEntries);
} else if (policy == "threshold") {
lsqPolicy = Threshold;
@@ -166,7 +166,7 @@ LSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
maxSQEntries = params->smtLSQThreshold;
DPRINTF(LSQ, "LSQ sharing policy set to Threshold: "
- "%i entries per LQ | %i entries per SQ",
+ "%i entries per LQ | %i entries per SQ\n",
maxLQEntries,maxSQEntries);
} else {
assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic,"
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index cc5044c20..8508071b4 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -88,7 +88,7 @@ SimpleRenameMap::init(unsigned _numLogicalIntRegs,
floatRenameMap.resize(numLogicalRegs);
if (bindRegs) {
- DPRINTF(Rename, "Binding registers into rename map %i",id);
+ DPRINTF(Rename, "Binding registers into rename map %i\n",id);
// Initialize the entries in the integer rename map to point to the
// physical registers of the same index
@@ -108,7 +108,7 @@ SimpleRenameMap::init(unsigned _numLogicalIntRegs,
floatRenameMap[index].physical_reg = freg_idx++;
}
} else {
- DPRINTF(Rename, "Binding registers into rename map %i",id);
+ DPRINTF(Rename, "Binding registers into rename map %i\n",id);
PhysRegIndex temp_ireg = ireg_idx;