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-rw-r--r--src/sim/Root.py2
-rw-r--r--src/sim/eventq.cc6
-rw-r--r--src/sim/eventq.hh2
-rw-r--r--src/sim/insttracer.hh2
-rw-r--r--src/sim/pseudo_inst.cc4
5 files changed, 8 insertions, 8 deletions
diff --git a/src/sim/Root.py b/src/sim/Root.py
index c6f7cfba6..776222b9c 100644
--- a/src/sim/Root.py
+++ b/src/sim/Root.py
@@ -50,7 +50,7 @@ class Root(SimObject):
# args. Seems like a bad design but that's the way it is.
Root._the_instance = SimObject.__new__(cls)
return Root._the_instance
-
+
@classmethod
def getInstance(cls):
return Root._the_instance
diff --git a/src/sim/eventq.cc b/src/sim/eventq.cc
index 698ecd116..7c2648c64 100644
--- a/src/sim/eventq.cc
+++ b/src/sim/eventq.cc
@@ -263,9 +263,9 @@ Event::unserialize(CheckpointIn &cp)
// Old checkpoints had no concept of the Initialized flag
// so restoring from old checkpoints always fail.
- // Events are initialized on construction but original code
- // "flags = _flags" would just overwrite the initialization.
- // So, read in the checkpoint flags, but then set the Initialized
+ // Events are initialized on construction but original code
+ // "flags = _flags" would just overwrite the initialization.
+ // So, read in the checkpoint flags, but then set the Initialized
// flag on top of it in order to avoid failures.
assert(initialized());
flags = _flags;
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index 184d6ec3b..eeb392153 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -95,7 +95,7 @@ inline void curEventQueue(EventQueue *q) { _curEventQueue = q; }
*/
class EventBase
{
- protected:
+ protected:
typedef unsigned short FlagsType;
typedef ::Flags<FlagsType> Flags;
diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh
index 6819c2199..7b15d1f91 100644
--- a/src/sim/insttracer.hh
+++ b/src/sim/insttracer.hh
@@ -183,7 +183,7 @@ class InstRecord
void setPredicate(bool val) { predicate = val; }
virtual void dump() = 0;
-
+
public:
Tick getWhen() const { return when; }
ThreadContext *getThread() const { return thread; }
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 67c47ce77..12df08f2d 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -645,7 +645,7 @@ switchcpu(ThreadContext *tc)
}
//
-// This function is executed when annotated work items begin. Depending on
+// This function is executed when annotated work items begin. Depending on
// what the user specified at the command line, the simulation may exit and/or
// take a checkpoint when a certain work item begins.
//
@@ -708,7 +708,7 @@ workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
}
//
-// This function is executed when annotated work items end. Depending on
+// This function is executed when annotated work items end. Depending on
// what the user specified at the command line, the simulation may exit and/or
// take a checkpoint when a certain work item ends.
//