12 files changed, 34 insertions, 324 deletions
diff --git a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
index c1b996e54..4a0c2a362 100644
--- a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
+++ b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
@@ -32,17 +32,17 @@ from m5.SimObject import SimObject
 from m5.objects.ArmInterrupts import ArmInterrupts
 from m5.objects.ArmISA import ArmISA
 from m5.objects.FastModel import AmbaInitiatorSocket, AmbaTargetSocket
-from m5.objects.FastModelArch import FastModelArmCPU
 from m5.objects.FastModelGIC import Gicv3CommsTargetSocket
 from m5.objects.Gic import ArmPPI
+from m5.objects.Iris import IrisBaseCPU
 from m5.objects.SystemC import SystemC_ScModule
 
-class FastModelCortexA76(FastModelArmCPU):
+class FastModelCortexA76(IrisBaseCPU):
     type = 'FastModelCortexA76'
     cxx_class = 'FastModel::CortexA76'
     cxx_header = 'arch/arm/fastmodel/CortexA76/cortex_a76.hh'
 
-    cntfrq = 0x1800000
+    cntfrq = Param.UInt64(0x1800000, "Value for the CNTFRQ timer register")
 
     # We shouldn't need these, but gem5 gets mad without them.
     interrupts = [ ArmInterrupts() ]
diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
index 0b50f30e4..cd0435937 100644
--- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
+++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
@@ -29,7 +29,6 @@
 
 #include "arch/arm/fastmodel/CortexA76/cortex_a76.hh"
 
-#include "arch/arm/fastmodel/arm/cpu.hh"
 #include "arch/arm/fastmodel/iris/cpu.hh"
 #include "base/logging.hh"
 #include "dev/arm/base_gic.hh"
@@ -40,6 +39,13 @@ namespace FastModel
 {
 
 void
+CortexA76::initState()
+{
+    for (auto *tc : threadContexts)
+        tc->setMiscRegNoEffect(ArmISA::MISCREG_CNTFRQ_EL0, params().cntfrq);
+}
+
+void
 CortexA76::setCluster(CortexA76Cluster *_cluster, int _num)
 {
     cluster = _cluster;
@@ -91,7 +97,7 @@ CortexA76::getPort(const std::string &if_name, PortID idx)
     if (if_name == "redistributor")
         return cluster->getEvs()->gem5_getPort(if_name, num);
     else
-        return ArmCPU::getPort(if_name, idx);
+        return Base::getPort(if_name, idx);
 }
 
 CortexA76Cluster::CortexA76Cluster(Params &p) :
diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
index c003c7944..168842051 100644
--- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
+++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
@@ -31,7 +31,8 @@
 #define __ARCH_ARM_FASTMODEL_CORTEXA76_CORETEX_A76_HH__
 
 #include "arch/arm/fastmodel/amba_ports.hh"
-#include "arch/arm/fastmodel/arm/cpu.hh"
+#include "arch/arm/fastmodel/iris/arm/thread_context.hh"
+#include "arch/arm/fastmodel/iris/cpu.hh"
 #include "params/FastModelCortexA76.hh"
 #include "params/FastModelCortexA76Cluster.hh"
 #include "scx/scx.h"
@@ -50,10 +51,11 @@ namespace FastModel
 // the work.
 class CortexA76Cluster;
 
-class CortexA76 : public ArmCPU
+class CortexA76 : public Iris::CPU<Iris::ArmThreadContext>
 {
   protected:
     typedef FastModelCortexA76Params Params;
+    typedef Iris::CPU<Iris::ArmThreadContext> Base;
     const Params &_params;
 
     CortexA76Cluster *cluster = nullptr;
@@ -62,7 +64,24 @@ class CortexA76 : public ArmCPU
     const Params &params() { return _params; }
 
   public:
-    CortexA76(Params &p) : ArmCPU(&p), _params(p) {}
+    CortexA76(Params &p) : Base(&p, scx::scx_get_iris_connection_interface()),
+        _params(p)
+    {}
+
+    void
+    clockPeriodUpdated() override
+    {
+        Base::clockPeriodUpdated();
+
+        // FIXME(b/139447397): this is a workaround since CNTFRQ_EL0 should not
+        // be modified after clock is changed in real hardwares. Remove or
+        // modify this after a more reasonable solution is found.
+        for (auto *tc : threadContexts) {
+            tc->setMiscRegNoEffect(ArmISA::MISCREG_CNTFRQ_EL0, frequency());
+        }
+    }
+
+    void initState() override;
 
     template <class T>
     void set_evs_param(const std::string &n, T val);
diff --git a/src/arch/arm/fastmodel/CortexA76/evs.cc b/src/arch/arm/fastmodel/CortexA76/evs.cc
index ed5f555ea..27f63649f 100644
--- a/src/arch/arm/fastmodel/CortexA76/evs.cc
+++ b/src/arch/arm/fastmodel/CortexA76/evs.cc
@@ -30,7 +30,7 @@
 #include "arch/arm/fastmodel/CortexA76/evs.hh"
 
 #include "arch/arm/fastmodel/CortexA76/cortex_a76.hh"
-#include "arch/arm/fastmodel/arm/cpu.hh"
+#include "arch/arm/fastmodel/iris/cpu.hh"
 #include "base/logging.hh"
 #include "dev/arm/base_gic.hh"
 #include "sim/core.hh"
diff --git a/src/arch/arm/fastmodel/arm/FastModelArch.py b/src/arch/arm/fastmodel/arm/FastModelArch.py
deleted file mode 100644
index b2869563f..000000000
--- a/src/arch/arm/fastmodel/arm/FastModelArch.py
+++ /dev/null
@@ -1,38 +0,0 @@
-# Copyright 2019 Google, Inc.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Gabe Black
-
-from m5.params import *
-from m5.proxy import *
-
-from m5.objects.IrisArch import IrisArmCPU
-
-class FastModelArmCPU(IrisArmCPU):
-    type = 'FastModelArmCPU'
-    cxx_class = 'FastModel::ArmCPU'
-    cxx_header = 'arch/arm/fastmodel/arm/cpu.hh'
-
-    cntfrq = Param.UInt64("Value for the CNTFRQ timer register")
diff --git a/src/arch/arm/fastmodel/arm/SConscript b/src/arch/arm/fastmodel/arm/SConscript
deleted file mode 100644
index e312b62b4..000000000
--- a/src/arch/arm/fastmodel/arm/SConscript
+++ /dev/null
@@ -1,34 +0,0 @@
-# Copyright 2019 Google, Inc.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Gabe Black
-
-Import('*')
-
-if not env['USE_ARM_FASTMODEL'] or env['TARGET_ISA'] != 'arm':
-    Return()
-
-SimObject('FastModelArch.py')
-Source('cpu.cc')
diff --git a/src/arch/arm/fastmodel/arm/cpu.cc b/src/arch/arm/fastmodel/arm/cpu.cc
deleted file mode 100644
index c87c2ac5f..000000000
--- a/src/arch/arm/fastmodel/arm/cpu.cc
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright 2019 Google, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#include "arch/arm/fastmodel/arm/cpu.hh"
-
-#include "scx/scx_iris.h"
-
-namespace FastModel
-{
-
-ArmCPU::ArmCPU(FastModelArmCPUParams *params) :
-    Iris::ArmCPU(params, scx::scx_get_iris_connection_interface())
-{
-}
-
-void
-ArmCPU::initState()
-{
-    auto cntfrq = static_cast<const FastModelArmCPUParams *>(params())->cntfrq;
-    for (auto *tc : threadContexts)
-        tc->setMiscRegNoEffect(ArmISA::MISCREG_CNTFRQ_EL0, cntfrq);
-}
-
-} // namespace FastModel
-
-FastModel::ArmCPU *
-FastModelArmCPUParams::create()
-{
-    return new FastModel::ArmCPU(this);
-}
diff --git a/src/arch/arm/fastmodel/arm/cpu.hh b/src/arch/arm/fastmodel/arm/cpu.hh
deleted file mode 100644
index 379174ec3..000000000
--- a/src/arch/arm/fastmodel/arm/cpu.hh
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright 2019 Google, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __ARCH_ARM_FASTMODEL_ARM_CPU_HH__
-#define __ARCH_ARM_FASTMODEL_ARM_CPU_HH__
-
-#include "arch/arm/fastmodel/iris/arm/cpu.hh"
-#include "params/FastModelArmCPU.hh"
-
-namespace FastModel
-{
-
-// This class adds non-Iris, gem5 functionality to this CPU model.
-class ArmCPU : public Iris::ArmCPU
-{
-  public:
-    ArmCPU(FastModelArmCPUParams *params);
-
-    void initState() override;
-};
-
-} // namespace FastModel
-
-#endif // __ARCH_ARM_FASTMODEL_ARM_CPU_HH__
diff --git a/src/arch/arm/fastmodel/iris/arm/IrisArch.py b/src/arch/arm/fastmodel/iris/arm/IrisArch.py
deleted file mode 100644
index 4d2856f99..000000000
--- a/src/arch/arm/fastmodel/iris/arm/IrisArch.py
+++ /dev/null
@@ -1,37 +0,0 @@
-# Copyright 2019 Google, Inc.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Gabe Black
-
-from m5.params import *
-from m5.proxy import *
-
-from m5.objects.Iris import IrisBaseCPU
-
-class IrisArmCPU(IrisBaseCPU):
-    type = 'IrisArmCPU'
-    abstract=True
-    cxx_class = 'Iris::ArmCPU'
-    cxx_header = "arch/arm/fastmodel/iris/arm/cpu.hh"
diff --git a/src/arch/arm/fastmodel/iris/arm/SConscript b/src/arch/arm/fastmodel/iris/arm/SConscript
index a8cb24be3..b32dc6d36 100644
--- a/src/arch/arm/fastmodel/iris/arm/SConscript
+++ b/src/arch/arm/fastmodel/iris/arm/SConscript
@@ -30,6 +30,4 @@ Import('*')
 if not env['USE_ARM_FASTMODEL'] or env['TARGET_ISA'] != 'arm':
     Return()
 
-SimObject('IrisArch.py')
-
 Source('thread_context.cc')
diff --git a/src/arch/arm/fastmodel/iris/arm/cpu.cc b/src/arch/arm/fastmodel/iris/arm/cpu.cc
deleted file mode 100644
index 7ffafc3cc..000000000
--- a/src/arch/arm/fastmodel/iris/arm/cpu.cc
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright 2019 Google, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#include "arch/arm/fastmodel/iris/arm/cpu.hh"
-
-Iris::ArmCPU *
-IrisCPUParams::create()
-{
-    return new Iris::ArmCPU(this);
-}
diff --git a/src/arch/arm/fastmodel/iris/arm/cpu.hh b/src/arch/arm/fastmodel/iris/arm/cpu.hh
deleted file mode 100644
index 8abbbba61..000000000
--- a/src/arch/arm/fastmodel/iris/arm/cpu.hh
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright 2019 Google, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __ARCH_ARM_FASTMODEL_IRIS_ARM_CPU_HH__
-#define __ARCH_ARM_FASTMODEL_IRIS_ARM_CPU_HH__
-
-#include "arch/arm/fastmodel/iris/arm/thread_context.hh"
-#include "arch/arm/fastmodel/iris/cpu.hh"
-
-namespace Iris
-{
-
-// This class specializes the generic Iris CPU template to use the Arm
-// Iris ThreadContext.
-class ArmCPU : public CPU<ArmThreadContext>
-{
-  public:
-    using CPU<ArmThreadContext>::CPU;
-
-    void
-    clockPeriodUpdated() override
-    {
-        CPU<ArmThreadContext>::clockPeriodUpdated();
-
-        // FIXME(b/139447397): this is a workaround since CNTFRQ_EL0 should not
-        // be modified after clock is changed in real hardwares. Remove or
-        // modify this after a more reasonable solution is found.
-        for (auto *tc : threadContexts) {
-            tc->setMiscRegNoEffect(ArmISA::MISCREG_CNTFRQ_EL0, frequency());
-        }
-    }
-};
-
-} // namespace Iris
-
-#endif // __ARCH_ARM_FASTMODEL_IRIS_ARM_CPU_HH__