summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/cpu/minor/execute.cc13
1 files changed, 8 insertions, 5 deletions
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index c9970b39a..832609993 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014,2018 ARM Limited
+ * Copyright (c) 2013-2014,2018-2019 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -498,12 +498,15 @@ Execute::executeMemRefInst(MinorDynInstPtr inst, BranchData &branch,
if (inst->traceData)
inst->traceData->setPredicate(passed_predicate);
- /* If the instruction didn't pass its predicate (and so will not
- * progress from here) Try to branch to correct and branch
- * mis-prediction. */
- if (!passed_predicate) {
+ /* If the instruction didn't pass its predicate
+ * or it is a predicated vector instruction and the
+ * associated predicate register is all-false (and so will not
+ * progress from here) Try to branch to correct and branch
+ * mis-prediction. */
+ if (!inst->inLSQ) {
/* Leave it up to commit to handle the fault */
lsq.pushFailedRequest(inst);
+ inst->inLSQ = true;
}
}