diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/X86LocalApic.py | 9 | ||||
-rw-r--r-- | src/arch/x86/interrupts.cc | 21 | ||||
-rw-r--r-- | src/arch/x86/interrupts.hh | 8 |
3 files changed, 25 insertions, 13 deletions
diff --git a/src/arch/x86/X86LocalApic.py b/src/arch/x86/X86LocalApic.py index c1b835ccb..456409a62 100644 --- a/src/arch/x86/X86LocalApic.py +++ b/src/arch/x86/X86LocalApic.py @@ -42,10 +42,10 @@ from m5.defines import buildEnv from m5.params import * from m5.proxy import * -from m5.objects.Device import BasicPioDevice +from m5.objects.Device import PioDevice from m5.objects.ClockDomain import DerivedClockDomain -class X86LocalApic(BasicPioDevice): +class X86LocalApic(PioDevice): type = 'X86LocalApic' cxx_class = 'X86ISA::Interrupts' cxx_header = 'arch/x86/interrupts.hh' @@ -54,10 +54,7 @@ class X86LocalApic(BasicPioDevice): int_latency = Param.Latency('1ns', \ "Latency for an interrupt to propagate through this device.") - # pio_addr isn't used by the local APIC model since it's address is - # calculated dynamically using the initial ID of the CPU it's attached to, - # but it needs to be set to something to make the BasicPioDevice happy. - pio_addr = 0x2000000000000000 + pio_latency = Param.Latency('100ns', 'Programmed IO latency') # The clock rate for the local APIC timer is supposed to be the "bus clock" # which we assume is 1/16th the rate of the CPU clock. I don't think this diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc index 8ba181948..b7d023537 100644 --- a/src/arch/x86/interrupts.cc +++ b/src/arch/x86/interrupts.cc @@ -191,7 +191,7 @@ Tick X86ISA::Interrupts::read(PacketPtr pkt) { Addr offset = pkt->getAddr() - pioAddr; - //Make sure we're at least only accessing one register. + // Make sure we're at least only accessing one register. if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3))) panic("Accessed more than one register at a time in the APIC!\n"); ApicRegIndex reg = decodeAddr(offset); @@ -208,7 +208,7 @@ Tick X86ISA::Interrupts::write(PacketPtr pkt) { Addr offset = pkt->getAddr() - pioAddr; - //Make sure we're at least only accessing one register. + // Make sure we're at least only accessing one register. if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3))) panic("Accessed more than one register at a time in the APIC!\n"); ApicRegIndex reg = decodeAddr(offset); @@ -295,7 +295,7 @@ X86ISA::Interrupts::init() // int port that it inherited from IntDevice. Note IntDevice is // not a SimObject itself. // - BasicPioDevice::init(); + PioDevice::init(); IntDevice::init(); // the slave port has a range so inform the connected master @@ -348,6 +348,16 @@ X86ISA::Interrupts::recvResponse(PacketPtr pkt) AddrRangeList +X86ISA::Interrupts::getAddrRanges() const +{ + assert(cpu); + AddrRangeList ranges; + ranges.push_back(RangeSize(pioAddr, PageBytes)); + return ranges; +} + + +AddrRangeList X86ISA::Interrupts::getIntAddrRange() const { AddrRangeList ranges; @@ -587,7 +597,7 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val) X86ISA::Interrupts::Interrupts(Params * p) - : BasicPioDevice(p, PageBytes), IntDevice(this, p->int_latency), + : PioDevice(p), IntDevice(this, p->int_latency), apicTimerEvent([this]{ processApicTimerEvent(); }, name()), pendingSmi(false), smiVector(0), pendingNmi(false), nmiVector(0), @@ -596,7 +606,8 @@ X86ISA::Interrupts::Interrupts(Params * p) pendingStartup(false), startupVector(0), startedUp(false), pendingUnmaskableInt(false), pendingIPIs(0), cpu(NULL), - intSlavePort(name() + ".int_slave", this, this) + intSlavePort(name() + ".int_slave", this, this), + pioDelay(p->pio_latency) { memset(regs, 0, sizeof(regs)); //Set the local apic DFR to the flat model. diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh index dfdff2b3f..bd674cc7e 100644 --- a/src/arch/x86/interrupts.hh +++ b/src/arch/x86/interrupts.hh @@ -72,7 +72,7 @@ namespace X86ISA { ApicRegIndex decodeAddr(Addr paddr); -class Interrupts : public BasicPioDevice, IntDevice +class Interrupts : public PioDevice, IntDevice { protected: // Storage for the APIC registers @@ -174,6 +174,9 @@ class Interrupts : public BasicPioDevice, IntDevice // Port for receiving interrupts IntSlavePort intSlavePort; + Tick pioDelay; + Addr pioAddr = MaxAddr; + public: int getInitialApicId() { return initialApicId; } @@ -213,6 +216,7 @@ class Interrupts : public BasicPioDevice, IntDevice return entry.periodic; } + AddrRangeList getAddrRanges() const override; AddrRangeList getIntAddrRange() const override; Port &getPort(const std::string &if_name, @@ -223,7 +227,7 @@ class Interrupts : public BasicPioDevice, IntDevice } else if (if_name == "int_slave") { return intSlavePort; } - return BasicPioDevice::getPort(if_name, idx); + return PioDevice::getPort(if_name, idx); } /* |