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-rw-r--r--src/dev/storage/ide_ctrl.cc2
-rw-r--r--src/dev/storage/ide_disk.cc9
-rw-r--r--src/dev/storage/ide_disk.hh9
3 files changed, 12 insertions, 8 deletions
diff --git a/src/dev/storage/ide_ctrl.cc b/src/dev/storage/ide_ctrl.cc
index 91f27bea3..3851c8329 100644
--- a/src/dev/storage/ide_ctrl.cc
+++ b/src/dev/storage/ide_ctrl.cc
@@ -124,7 +124,7 @@ IdeController::IdeController(Params *p)
panic("IDE controllers support a maximum "
"of 4 devices attached!\n");
}
- params()->disks[i]->setController(this);
+ params()->disks[i]->setController(this, sys->getPageBytes());
}
primary.select(false);
diff --git a/src/dev/storage/ide_disk.cc b/src/dev/storage/ide_disk.cc
index c31c0928f..f2cea5e5e 100644
--- a/src/dev/storage/ide_disk.cc
+++ b/src/dev/storage/ide_disk.cc
@@ -56,7 +56,6 @@
#include "base/chunk_generator.hh"
#include "base/cprintf.hh" // csprintf
#include "base/trace.hh"
-#include "config/the_isa.hh"
#include "debug/IdeDisk.hh"
#include "dev/storage/disk_image.hh"
#include "dev/storage/ide_ctrl.hh"
@@ -440,7 +439,7 @@ IdeDisk::doDmaRead()
// clear out the data buffer
memset(dataBuffer, 0, MAX_DMA_SIZE);
dmaReadCG = new ChunkGenerator(curPrd.getBaseAddr(),
- curPrd.getByteCount(), TheISA::PageBytes);
+ curPrd.getByteCount(), pageBytes);
}
if (ctrl->dmaPending() || ctrl->drainState() != DrainState::Running) {
@@ -452,7 +451,7 @@ IdeDisk::doDmaRead()
&dmaReadWaitEvent, dataBuffer + dmaReadCG->complete());
dmaReadBytes += dmaReadCG->size();
dmaReadTxs++;
- if (dmaReadCG->size() == TheISA::PageBytes)
+ if (dmaReadCG->size() == pageBytes)
dmaReadFullPages++;
dmaReadCG->next();
} else {
@@ -523,7 +522,7 @@ IdeDisk::doDmaWrite()
if (!dmaWriteCG) {
// clear out the data buffer
dmaWriteCG = new ChunkGenerator(curPrd.getBaseAddr(),
- curPrd.getByteCount(), TheISA::PageBytes);
+ curPrd.getByteCount(), pageBytes);
}
if (ctrl->dmaPending() || ctrl->drainState() != DrainState::Running) {
schedule(dmaWriteWaitEvent, curTick() + DMA_BACKOFF_PERIOD);
@@ -537,7 +536,7 @@ IdeDisk::doDmaWrite()
curPrd.getByteCount(), curPrd.getEOT());
dmaWriteBytes += dmaWriteCG->size();
dmaWriteTxs++;
- if (dmaWriteCG->size() == TheISA::PageBytes)
+ if (dmaWriteCG->size() == pageBytes)
dmaWriteFullPages++;
dmaWriteCG->next();
} else {
diff --git a/src/dev/storage/ide_disk.hh b/src/dev/storage/ide_disk.hh
index fa5bb760d..37aa9eed1 100644
--- a/src/dev/storage/ide_disk.hh
+++ b/src/dev/storage/ide_disk.hh
@@ -241,6 +241,8 @@ class IdeDisk : public SimObject
DmaState_t dmaState;
/** Dma transaction is a read */
bool dmaRead;
+ /** Size of OS pages. */
+ Addr pageBytes;
/** PRD table base address */
uint32_t curPrdAddr;
/** PRD entry */
@@ -282,9 +284,12 @@ class IdeDisk : public SimObject
* Set the controller for this device
* @param c The IDE controller
*/
- void setController(IdeController *c) {
- if (ctrl) panic("Cannot change the controller once set!\n");
+ void
+ setController(IdeController *c, Addr page_bytes)
+ {
+ panic_if(ctrl, "Cannot change the controller once set!\n");
ctrl = c;
+ pageBytes = page_bytes;
}
// Device register read/write