index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
2004-02-24
add in an init() callback for CPU's so that no stats are accessed prior to th...
Lisa Hsu
2004-02-23
Quote args properly in tracediff.
Steve Reinhardt
2004-02-23
Only one request may be on the dma interface at a time,
Nathan Binkert
2004-02-23
extend the hack by turning the address into a real
Nathan Binkert
2004-02-23
Don't issue memory requests for bogus addresses
Nathan Binkert
2004-02-23
Make this like PCI-X
Nathan Binkert
2004-02-22
configurable latency for programmed IO
Nathan Binkert
2004-02-21
Change order of serialization
Nathan Binkert
2004-02-21
New Ethernet device. Descriptors are now done via DMA instead
Nathan Binkert
2004-02-20
Add a simple event wrapper class that takes a class pointer
Nathan Binkert
2004-02-20
make the dma interface useable.
Nathan Binkert
2004-02-20
make uncacheable stuff happen again
Nathan Binkert
2004-02-20
make the devices default to being attached to the memory bus
Nathan Binkert
2004-02-20
Don't need to specify two etherdump devices
Nathan Binkert
2004-02-20
Make it so dump takes a void *
Nathan Binkert
2004-02-20
make etherdump work again
Nathan Binkert
2004-02-20
Merge zizzer.eecs.umich.edu:/bk/m5
Nathan Binkert
2004-02-20
Merge zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/rdreslin/m5bk/clean
Ron Dreslinski
2004-02-20
Add serialization for packets on the ethernet link,
Ron Dreslinski
2004-02-20
put back $SETUPDIR = $ENV{PWD} for amd purposes.
Lisa Hsu
2004-02-20
Merge zizzer.eecs.umich.edu:/bk/m5
Nathan Binkert
2004-02-19
interestingly, when setup is called from a perl script, when you chdir in the...
Lisa Hsu
2004-02-18
Change the physical memory logic, and also add misspeculation fix to
Andrew Schultz
2004-02-18
Merge zizzer.eecs.umich.edu:/bk/m5
Nathan Binkert
2004-02-18
couple fixes
Nathan Binkert
2004-02-18
Merge
Nathan Binkert
2004-02-17
Add COW support to the IIC.
Erik Hallnor
2004-02-17
Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
Erik Hallnor
2004-02-17
Change the way data is handled in the cache blocks.
Erik Hallnor
2004-02-16
Change logic for translating a memory addresses, extra checks for invalid
Andrew Schultz
2004-02-16
Rework BusBridge to have a latency and handle bus IDs correctly.
Erik Hallnor
2004-02-14
Add full copy support.
Erik Hallnor
2004-02-13
Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5
Nathan Binkert
2004-02-13
fix up vtophys a bit
Nathan Binkert
2004-02-12
better debugging
Nathan Binkert
2004-02-11
Add support for all devices to get requests from a timing memory bus.
Nathan Binkert
2004-02-10
Merge zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
Steve Reinhardt
2004-02-10
Fixes for Linux syscall emulation.
Steve Reinhardt
2004-02-10
Add support for multiple outstanding aligned copies
Erik Hallnor
2004-02-09
Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
Erik Hallnor
2004-02-09
Add LRU aligned copies to the hierarchy, with only one outstanding copy. Alig...
Erik Hallnor
2004-02-09
- Whack unused code
Nathan Binkert
2004-02-09
Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5
Nathan Binkert
2004-02-09
Add that one IPR memory space address that we keep seeing
Nathan Binkert
2004-02-09
random fixes
Nathan Binkert
2004-02-09
Commit regenerated trace_flags.* based on merged traceflags.pl.
Steve Reinhardt
2004-02-09
bk resolve is making me commit these even though they're broken.
Steve Reinhardt
2004-02-09
Results of automatic (yet incomplete) merge.
Steve Reinhardt
2004-02-09
Add support for memory barriers.
Steve Reinhardt
2004-02-08
Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
Erik Hallnor
[next]