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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
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Author
2011-02-23
inorder: add 00.gzip and 60.bzip2 regression tests
Korey Sewell
2011-02-23
inorder: InstSeqNum bug
Korey Sewell
2011-02-23
inorder: dyn inst initialization
Korey Sewell
2011-02-23
inorder: cache packet handling
Korey Sewell
2011-02-23
ARM: Update regression tests for preceeding changes.
Ali Saidi
2011-02-23
Mem: Print out memory when access > 8 bytes
Ali Saidi
2011-02-23
ARM: Set ITSTATE correctly after FlushPipe
Ali Saidi
2011-02-23
ARM: This panic can be hit during misspeculation so it can't exist.
Ali Saidi
2011-02-23
ARM: Bad interworking warn way to noisy when running real code w/misspeculation.
Ali Saidi
2011-02-23
O3: When a prefetch causes a fault, don't record it in the inst
Ali Saidi
2011-02-23
ARM: NEON instruction templates modified to set the predicate flag to false w...
Giacomo Gabrielli
2011-02-23
O3: If there is an outstanding table walk don't let the inst queue sleep.
Ali Saidi
2011-02-23
ARM: Squash state on FPSCR stride or len write.
Ali Saidi
2011-02-23
ARM: Mark store conditionals as such.
Matt Horsnell
2011-02-23
ARM: Do something for ISB, DSB, DMB
Ali Saidi
2011-02-23
ARM: Fix bug that let two table walks occur in parallel.
Ali Saidi
2011-02-23
Includes: Don't include isa_traits.hh and use the TheISA namespace unless rea...
Ali Saidi
2011-02-23
ARM: Make Noop actually decode to a noop and set it's instflags.
Ali Saidi
2011-02-23
O3: Fix bug when a squash occurs right before TLB miss returns.
Ali Saidi
2011-02-23
ARM: Delete OABI syscall handling.
Ali Saidi
2011-02-23
CLCD: Fix some serialization bugs with the clcd controller.
Ali Saidi
2011-02-23
ARM: Clarifies creation of Linux and baremetal ARM systems.
Ali Saidi
2011-02-23
ARM: Add support for read of 100MHz clock in system controller.
Ali Saidi
2011-02-23
ARM: Reset simulation statistics when pref counters are reset.
Ali Saidi
2011-02-23
ARM: Adds dummy support for a L2 latency miscreg.
Ali Saidi
2011-02-23
configs: cache: add cache line size option
Korey Sewell
2011-02-23
configs: set default cache params
Korey Sewell
2011-02-23
ruby: extend dprintfs for RubyGenerated TraceFlag
Korey Sewell
2011-02-23
ruby: cleaning up RubyQueue and RubyNetwork dprintfs
Korey Sewell
2011-02-22
m5: merged in hammer fix
Brad Beckmann
2011-02-19
Ruby: Machine Type missing in MOESI CMP directory protocol
Nilay Vaish
2011-02-19
Ruby: clean MOESI CMP directory protocol
Nilay Vaish
2011-02-18
m5: merge inorder/release-notes/make_release changes
Korey Sewell
2011-02-18
inorder: regr-update: reduce dynamic mem. use to speedup sims
Korey Sewell
2011-02-18
inorder: add names and slot #s to res. dprints
Korey Sewell
2011-02-18
inorder: ignore nops in execution unit
Korey Sewell
2011-02-18
inorder: update graduation unit
Korey Sewell
2011-02-18
inorder: recognize isSerializeAfter flag
Korey Sewell
2011-02-18
inorder: update default thread size(=1)
Korey Sewell
2011-02-18
inorder: don't overuse getLatency()
Korey Sewell
2011-02-18
inorder: update max. resource bandwidths
Korey Sewell
2011-02-18
inorder: cleanup in destructors
Korey Sewell
2011-02-18
inorder: fix cache/fetch unit memory leaks
Korey Sewell
2011-02-18
inorder: remove events for zero-cycle resources
Korey Sewell
2011-02-18
inorder: update pipeline interface for handling finished resource reqs
Korey Sewell
2011-02-18
inorder: remove request map, use request vector
Korey Sewell
2011-02-18
inorder: add valid bit for resource requests
Korey Sewell
2011-02-18
inorder: remove reqRemoveList
Korey Sewell
2011-02-18
inorder: initialize res. req. vectors based on resource bandwidth
Korey Sewell
2011-02-16
merge alpha system files into tree
Nathan Binkert
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