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AgeCommit message (Expand)Author
2009-11-18ruby: Hammer ruby configuration supportBrad Beckmann
2009-11-18ruby: Changes necessary to get the hammer protocol to work in GEM5Brad Beckmann
2009-11-18ruby: added the original hammer protocols from old rubyBrad Beckmann
2009-11-18ruby: returns the number of LLC needed for broadcastBrad Beckmann
2009-11-18ruby: cache configuration fix to use bytesBrad Beckmann
2009-11-18ruby: fix CacheMemory destructorBrad Beckmann
2009-11-18ruby: split CacheMemory.hh into a .hh and a .ccBrad Beckmann
2009-11-18ruby: Added default names to message buffersBrad Beckmann
2009-11-18ruby: slicc method error fixBrad Beckmann
2009-11-18ruby: slicc action error fixBrad Beckmann
2009-11-18ruby: slicc state machine error fixesBrad Beckmann
2009-11-18ruby: Removed unused action z_stallBrad Beckmann
2009-11-18m5: Added option to take a checkpoint at the end of simulationBrad Beckmann
2009-11-18m5: Fixed bug in atomic cpu destructorBrad Beckmann
2009-11-18ruby: fixed dma mi example to work with multiple dma portsBrad Beckmann
2009-11-18m5: removed master and slave deletions.Brad Beckmann
2009-11-18m5: fixed destructor to deschedule the tickEvent and eventBrad Beckmann
2009-11-18ruby: getPort function fixBrad Beckmann
2009-11-18ruby: Fixed Directory memory destructorBrad Beckmann
2009-11-18m5: Moved profile option since Simulation depends on it.Brad Beckmann
2009-11-18m5: Added isValidSrc and isValidDest calls to packet.hhBrad Beckmann
2009-11-18ruby: included ruby config parameter ports per coreBrad Beckmann
2009-11-18ruby: Added error check for openning the ruby config fileBrad Beckmann
2009-11-18ruby: Support for merging ALPHA_FS and rubyBrad Beckmann
2009-11-18ruby: Added more info to bridge error messageBrad Beckmann
2009-11-18ruby: Ruby 64-bit address output fixes.Brad Beckmann
2009-11-18ruby: Ruby destruction fix.Brad Beckmann
2009-11-18ruby: Ruby debug print fixes.Brad Beckmann
2009-11-18ruby: Ruby memtest python script.Brad Beckmann
2009-11-18Added tag Calvin_Submission for changeset 5de565c4b7bdDerek Hower
2009-11-18ruby: added sequencer stats to track what requests are waiting onDerek Hower
2009-11-18ruby: turned off randomization by default, turned on memory controller random...Derek Hower
2009-11-17ARM: Begin implementing CP15Ali Saidi
2009-11-17ARM: Differentiate between LDM exception return and LDM user regs.Ali Saidi
2009-11-17ARM: Boilerplate full-system code.Ali Saidi
2009-11-16imported patch isa_fixes2.diffAli Saidi
2009-11-15ARM: Make the exception return form of ldm restore CPSR.Gabe Black
2009-11-15ARM: Create a new type of load uop that restores spsr into cpsr.Gabe Black
2009-11-14ARM: Check in the actual change from the last commit.Gabe Black
2009-11-14ARM: Switch the immediate and register versions of msr.Gabe Black
2009-11-14ARM: Fix up the implmentation of the msr instruction.Gabe Black
2009-11-14ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.Gabe Black
2009-11-14ARM: Add a bitfield to indicate if an immediate should be used.Gabe Black
2009-11-14ARM: Write some functions to write to the CPSR and SPSR for instructions.Gabe Black
2009-11-14ARM: Fix up the implmentation of the mrs instruction.Gabe Black
2009-11-14ARM: More accurately describe the effects of using the control operands.Gabe Black
2009-11-14ARM: Hook up the moded versions of the SPSR.Gabe Black
2009-11-14SE: Fix SE mode OS X compilation.Ali Saidi
2009-11-14ARM: Move around decoder to properly decode CP15Ali Saidi
2009-11-13ruby: added -A option to TwoLevel_SplitL1UnifiedL2 to set the L1 cache sizeDerek Hower