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AgeCommit message (Expand)Author
2007-07-30X86: Make register names in disassembly reflect high bytes.Gabe Black
2007-07-30X86: missed a file which adds a "fold" bit.Gabe Black
2007-07-30Make the register indices use the appropriate "fold" bit.Gabe Black
2007-07-30X86: Make disassembly use the final register index. Add bits to indicate whet...Gabe Black
2007-07-30X86: Missed a file for adding a bit to indicate that an REX prefix was present.Gabe Black
2007-07-30X86: Implement LEAVEGabe Black
2007-07-30X86: Add a bitfield to indicate whether or not an REX prefix was present.Gabe Black
2007-07-30Fix problem with tracer not being initialized.Gabe Black
2007-07-29Merge with head.Gabe Black
2007-07-29X86: Make logic instructions flag setting work.Gabe Black
2007-07-29X86: Make arithmetic instructions set the appropriate flags.Gabe Black
2007-07-29BsaeCPU: Get rid of some bad DPRINTFs.Steve Reinhardt
2007-07-29Statetrace: Make statetrace patch amd64 executables for true single stepping ...Gabe Black
2007-07-29Merge with head. style.py was also missing an argument in one call to modifie...Gabe Black
2007-07-29X86: Initial stack frame fixes and constant shuffling.Gabe Black
2007-07-29X86: Make limm use merge and allow overriding the data size.Gabe Black
2007-07-29Statetrace: Print the correct address of auxiliary vectors.Gabe Black
2007-07-29X86: Fix register ordering.Gabe Black
2007-07-29X86: return -return_value.value() on failure.Gabe Black
2007-07-29X86: Fix popa and push with the stack pointer.Gabe Black
2007-07-29X86: Fix a bug with mergeGabe Black
2007-07-28Work around a mercurial bug in bdiff.blocksNathan Binkert
2007-07-28X86: Fix a comment and adjust the stack base address.Gabe Black
2007-07-28Merge with head.Gabe Black
2007-07-28Statetrace: Implement the AMD64 version of TraceChild.Gabe Black
2007-07-28Statetrace: Fix indendation. Set the default hostname to "localhost" instead ...Gabe Black
2007-07-28Statetrace: Fix compilation problem.Gabe Black
2007-07-28X86: Fix up auxiliary vectors.Gabe Black
2007-07-28Turn the instruction tracing code into pluggable sim objects.Gabe Black
2007-07-28style: bad whitespaceNathan Binkert
2007-07-28style: fix stupid bugsNathan Binkert
2007-07-28style: Check/Fix whitespace on SCons filesNathan Binkert
2007-07-26scons: make things work when EXTRAS is not defined.Nathan Binkert
2007-07-26Merge with head.Gabe Black
2007-07-26X86: Fix argument register indexing.Gabe Black
2007-07-26X86: Hook in shift and rotate by one instructions, and NOT.Gabe Black
2007-07-26X86: Fix pc relative versions of add and subtract.Gabe Black
2007-07-26X86: Implement rotate-by-one instructions, and make register rotates use regi...Gabe Black
2007-07-26X86: Implement shift-by-one instructions, and make register shifts use regist...Gabe Black
2007-07-26X86: Add functions to read and write to an exec context.Gabe Black
2007-07-26X86: Fix carry calculation for subtraction based microops.Gabe Black
2007-07-26Add functions for mmap and brk.Gabe Black
2007-07-26Implement NOTGabe Black
2007-07-25Add a new SCons option called EXTRAS that allows you to include stuff inNathan Binkert
2007-07-24Merge with head.Gabe Black
2007-07-24Hook in a bunch of new instructions, fix a few minor bugs, and expand out one...Gabe Black
2007-07-24Add a tgt_iovec structure to support writev, change the name of X86Linux to X...Gabe Black
2007-07-24Add a special case for "test" which needs an immediate even though everything...Gabe Black
2007-07-24The groups of instructions hanging off opcode 71h, 72h, and 73h all need a by...Gabe Black
2007-07-24Make the shift and rotate microops mask the shift/rotate amount correctly.Gabe Black
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