summaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2011-06-19inorder: no dep. tracking for zero regKorey Sewell
2011-06-19imported patch recoverPCfromTrapKorey Sewell
2011-06-19imported patch squash_from_next_stageKorey Sewell
2011-06-19inorder: add flatDestReg member to dyninstKorey Sewell
2011-06-19inorder: update event prioritiesKorey Sewell
2011-06-19inorder: implement trap handlingKorey Sewell
2011-06-19inorder: cleanup intercomm. structs/squash infoKorey Sewell
2011-06-19inorder: use setupSquash for misspeculationKorey Sewell
2011-06-19sparc: init. cache state in TLBKorey Sewell
2011-06-19inorder: DynInst handling of stores for big-endian ISAsKorey Sewell
2011-06-19inorder: make marking of dest. regs an explicit requestKorey Sewell
2011-06-19inorder: simplify handling of split accessesKorey Sewell
2011-06-19inorder: addtl functionaly for inst. skedsKorey Sewell
2011-06-19inorder: register file statsKorey Sewell
2011-06-19inorder: scheduling for nonspec instsKorey Sewell
2011-06-19inorder: find register dependencies "lazily"Korey Sewell
2011-06-19inorder: assert on macro-opsKorey Sewell
2011-06-19inorder: handle faults at writeback stageKorey Sewell
2011-06-19inorder: ISA-zero reg handlingKorey Sewell
2011-06-19inorder: update support for branch delay slotsKorey Sewell
2011-06-19inorder: inst. iterator cleanupKorey Sewell
2011-06-19cpus/isa: add a != operator for pcstateKorey Sewell
2011-06-19inorder: update bpred codeKorey Sewell
2011-06-19inorder: add types for dependency checksKorey Sewell
2011-06-19inorder: use flattenIdx for reg indexingKorey Sewell
2011-06-19simple-thread: give a name() function for debugging w/the SimpleThread objectKorey Sewell
2011-06-19inorder: use m5_hash_map for skedCacheKorey Sewell
2011-06-17ARM: Cleanup m5ops usage of r0 and r1 a bit.Ali Saidi
2011-06-17ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA.Gedare Bloom
2011-06-16ARM: Handle case where new TLB size is different from previous TLB size.Ali Saidi
2011-06-16ARM: Fix memset on TLB flush and initializationChander Sudanthi
2011-06-14Ruby: Correct set LONG_BITS and INDEX_SHIFT in class Set.Nilay Vaish
2011-06-12Loader: Handle bad section names when loading an ELF file.Gabe Black
2011-06-12LibElf: Build the error management code in libelf.Gabe Black
2011-06-12sparc: update long regressionsKorey Sewell
2011-06-10sparc: update o3 regressionsKorey Sewell
2011-06-10o3: missing newlines on some dprintfsKorey Sewell
2011-06-10sparc: don't use directcntrl branch flagKorey Sewell
2011-06-10sparc: merge regr. updates w/last updateKorey Sewell
2011-06-10sparc: update simple cpu regressionsKorey Sewell
2011-06-09sparc: compilation fixes for inorderKorey Sewell
2011-06-08Ruby: Correctly set access permissions for directory entriesNilay Vaish
2011-06-08Mem: Use sysconf to get the page size instead of the PAGE_SIZE macro.Gabe Black
2011-06-07ISA parser: Loosen the regular expressions matching filenames.Gabe Black
2011-06-07gcc 4.0: Add some virtual destructors to make gcc 4.0 happy.Gabe Black
2011-06-03SLICC: Remove machine name as prefix to functionsNilay Vaish
2011-06-02SConstruct: automatically update .hg/hgrc with style hooks.Steve Reinhardt
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-06-02scons: rename some things from m5 to gem5Nathan Binkert
2011-06-02copyright: Add code for finding all copyright blocks and create a COPYING fileNathan Binkert
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 13:47:49 +0000