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Author
2015-03-02
tests: Run regression timeout as foreground
Andreas Hansson
2015-03-02
arm: Don't truncate 16-bit ASIDs to 8 bits
Andreas Sandberg
2015-03-02
arm: Correctly access the stack pointer in GDB
Andreas Sandberg
2015-03-02
arm: Fix broken page table permissions checks in remote GDB
Andreas Sandberg
2015-02-26
Ruby: Update backing store option to propagate through to all RubyPorts
Jason Power
2015-02-16
config: Add memcheck stress test
Andreas Hansson
2015-02-16
cpu: TrafficGen sinks snoops without complaining
Andreas Hansson
2015-02-16
mem: Fix initial value problem with MemChecker
Stephan Diestelhorst
2015-02-16
dev: Fix undefined behaviuor in i8254xGBe
Andreas Hansson
2015-02-16
arm: Wire up the GIC with the platform in the base class
Andreas Sandberg
2015-02-16
mem: mmap the backing store with MAP_NORESERVE
Andreas Hansson
2015-02-16
mem: Use the range cache for lookup as well as access
Andreas Hansson
2015-02-16
arch: Make readMiscRegNoEffect const throughout
Andreas Hansson
2015-01-16
config: add --root-device machine parameter
Curtis Dunham
2015-02-16
arm: Merge ISA files with pseudo instructions
Andreas Sandberg
2015-02-16
cpu: add support for outputing a protobuf formatted CPU trace
Ali Saidi
2015-02-11
mem: Clarification of packet crossbar timings
Marco Balboni
2015-02-11
mem: Clarify usage of latency in the cache
Marco Balboni
2015-02-11
style: Fix broken m5format command
Andreas Sandberg
2015-02-11
style: Fix incorrect style checker option name
Andreas Sandberg
2015-02-11
config: Revamp memtest to allow testers on any level
Andreas Hansson
2015-02-11
stats: Bump the MemTest regression stats
Andreas Hansson
2015-02-11
cpu: Tidy up the MemTest and make false sharing more obvious
Andreas Hansson
2015-02-11
sim: Move the BaseTLB to src/arch/generic/
Andreas Sandberg
2015-02-11
base: Add compiler macros to add deprecation warnings
Andreas Sandberg
2015-02-11
base: Do not dereference NULL in CompoundFlag creation
Andreas Hansson
2015-02-11
dev: Remove unused system pointer in the Platform base class
Andreas Sandberg
2015-02-06
cpu: Idle CPU status logic revised
Alexandru Dutu
2015-02-05
config: rename 'file' var
Steve Reinhardt
2015-02-05
config: make M5_PATH a real search path
Steve Reinhardt
2015-02-03
mem: Clarify express snoop behaviour
Andreas Hansson
2015-02-03
mem: Clarify cache behaviour for pending dirty responses
Andreas Hansson
2015-02-03
base: add an accessor and operators ==,!= to address ranges
Curtis Dunham
2015-02-03
config: Add XOR hashing to the DRAM channel interleaving
Andreas Hansson
2015-02-03
base: Add XOR-based hashed address interleaving
Andreas Hansson
2015-02-03
config: Adjust DRAM channel interleaving defaults
Andreas Hansson
2015-02-03
style: Update the style checker to handle new include order
Andreas Sandberg
2015-02-03
sim: Remove test for non-NULL this in Event
Andreas Sandberg
2015-02-03
dev: Correctly clear interrupts in VirtIO PCI
Andreas Sandberg
2015-02-03
scons: Avoid implicit command dependencies
Andreas Hansson
2014-12-19
sim: prioritize async events; prevent starvation
Curtis Dunham
2015-02-03
cpu: Ensure timing CPU sinks response before sending new request
Andreas Hansson
2015-02-03
config: Fix typo in Float param
Geoffrey Blake
2015-01-30
config: arm: fix os_flags
Malek Musleh
2015-01-25
arm: always set the IsFirstMicroop flag
Ali Saidi
2015-01-25
sim: Clean up InstRecord
Ali Saidi
2015-01-25
cpu: Remove all notion that we know when the cpu is misspeculating.
Ali Saidi
2015-01-25
cpu: Put all CPU instruction tracers in a single file
Ali Saidi
2015-01-25
cpu: remove legion tracer
Ali Saidi
2014-12-23
sim: fix reference counting of PythonEvent
Curtis Dunham
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