gem5 - gem5

Age	Commit message (Expand)	Author
2009-11-18	ruby: included ruby config parameter ports per core	Brad Beckmann
2009-11-18	ruby: Added error check for openning the ruby config file	Brad Beckmann
2009-11-18	ruby: Support for merging ALPHA_FS and ruby	Brad Beckmann
2009-11-18	ruby: Added more info to bridge error message	Brad Beckmann
2009-11-18	ruby: Ruby 64-bit address output fixes.	Brad Beckmann
2009-11-18	ruby: Ruby destruction fix.	Brad Beckmann
2009-11-18	ruby: Ruby debug print fixes.	Brad Beckmann
2009-11-18	ruby: Ruby memtest python script.	Brad Beckmann
2009-11-17	ARM: Begin implementing CP15	Ali Saidi
2009-11-17	ARM: Differentiate between LDM exception return and LDM user regs.	Ali Saidi
2009-11-17	ARM: Boilerplate full-system code.	Ali Saidi
2009-11-16	imported patch isa_fixes2.diff	Ali Saidi
2009-11-15	ARM: Make the exception return form of ldm restore CPSR.	Gabe Black
2009-11-15	ARM: Create a new type of load uop that restores spsr into cpsr.	Gabe Black
2009-11-14	ARM: Check in the actual change from the last commit.	Gabe Black
2009-11-14	ARM: Switch the immediate and register versions of msr.	Gabe Black
2009-11-14	ARM: Fix up the implmentation of the msr instruction.	Gabe Black
2009-11-14	ARM: Define a mask to differentiate purely CPSR bits from CondCodes bits.	Gabe Black
2009-11-14	ARM: Add a bitfield to indicate if an immediate should be used.	Gabe Black
2009-11-14	ARM: Write some functions to write to the CPSR and SPSR for instructions.	Gabe Black
2009-11-14	ARM: Fix up the implmentation of the mrs instruction.	Gabe Black
2009-11-14	ARM: More accurately describe the effects of using the control operands.	Gabe Black
2009-11-14	ARM: Hook up the moded versions of the SPSR.	Gabe Black
2009-11-14	SE: Fix SE mode OS X compilation.	Ali Saidi
2009-11-14	ARM: Move around decoder to properly decode CP15	Ali Saidi
2009-11-11	X86: add ULL to 1's being shifted in 64-bit values	Vince Weaver
2009-11-10	ARM: Fix some bugs in the ISA desc and fill out some instructions.	Gabe Black
2009-11-10	Merge with the head.	Gabe Black
2009-11-10	Mem: Eliminate the NO_FAULT request flag.	Gabe Black
2009-11-10	ARM: Implement fault classes.	Gabe Black
2009-11-10	ARM: Fix the integer register indexes.	Gabe Black
2009-11-10	X86: Fix bugs in movd implementation.	Vince Weaver
2009-11-10	X86: Remove double-cast in Cvtf2i micro-op	Vince Weaver
2009-11-09	syscall: missing initializer in getcwd call	Vince Weaver
2009-11-08	X86: Don't panic on faults on prefetches in SE mode.	Gabe Black
2009-11-08	X86: Explain what really didn't work with unmapped addresses in SE mode.	Gabe Black
2009-11-08	X86: Make x86 use PREFETCH instead of PF_EXCLUSIVE.	Gabe Black
2009-11-08	automerge	Nathan Binkert
2009-11-08	tests: update statistics for change caused by vsyscall support in x86	Nathan Binkert
2009-11-08	scons: deal with generated .py files properly	Steve Reinhardt
2009-11-08	ARM: Support forcing load/store multiple to use user registers.	Gabe Black
2009-11-08	ARM: Simplify the load/store multiple generation code.	Gabe Black
2009-11-08	compile: wrap 64bit numbers with ULL() so 32bit compiles work	Nathan Binkert
2009-11-08	ARM: Split the condition codes out of the CPSR.	Gabe Black
2009-11-08	ARM: Add in more bits for the mon mode.	Gabe Black
2009-11-08	ARM: Get rid of NumInternalProcRegs.	Gabe Black
2009-11-08	ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.	Gabe Black
2009-11-08	ARM: Get rid of the Raddr operand.	Gabe Black
2009-11-08	ARM: Initialize processes in user mode.	Gabe Black
2009-11-08	ARM: Implement the shadow registers using register flattening.	Gabe Black