gem5 - gem5

Age	Commit message (Expand)	Author
2006-02-26	code cleanup	Nathan Binkert
2006-02-26	forgot to add a chart option	Nathan Binkert
2006-02-26	add error bars and more options for legend placement	Nathan Binkert
2006-02-25	better colors for barcharts	Nathan Binkert
2006-02-25	Make sure cpu/static_inst_exec_sigs.hh get rebuilt when	Steve Reinhardt
2006-02-25	only build libelf.a, forget about the other	Nathan Binkert
2006-02-25	Since the delayed write stuff is gone, get rid of regWrite	Nathan Binkert
2006-02-24	Merge zizzer:/bk/m5	Lisa Hsu
2006-02-24	1) make it pretty for large clusters	Lisa Hsu
2006-02-23	Enable building only selected CPU models via new scons	Steve Reinhardt
2006-02-23	ev5.cc:	Ali Saidi
2006-02-23	Merge zizzer:/bk/m5	Ali Saidi
2006-02-23	Get rid of the xc from the alphaAccess/alphaConsole backdoor device.	Ali Saidi
2006-02-23	Create a Builder object for .isa files in arch/SConscript.	Steve Reinhardt
2006-02-23	Cast enum to int to fix compile error from regression.	Kevin Lim
2006-02-23	Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5	Steve Reinhardt
2006-02-23	Add pipe() syscall to Alpha Linux emulation.	Steve Reinhardt
2006-02-23	don't add an empty suboption description	Nathan Binkert
2006-02-23	make it possible to add filters for job names so that	Nathan Binkert
2006-02-23	fix stat name	Nathan Binkert
2006-02-22	Auto-generate arch/foo.hh "switch headers" in scons.	Steve Reinhardt
2006-02-22	Clean excess comments out of SConscripts.	Steve Reinhardt
2006-02-21	Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old...	Gabe Black
2006-02-21	Made Addr a global type	Gabe Black
2006-02-20	Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5	Gabe Black
2006-02-20	Merge gblack@m5.eecs.umich.edu:/bk/multiarch	Gabe Black
2006-02-20	Finished the implementing the change of the ISA from a class to a namespace	Gabe Black
2006-02-20	Get rid of the code that delays PIO write accesses	Nathan Binkert
2006-02-20	make MIPS specific	Korey Sewell
2006-02-20	load/store instruction format ... now generates load/store code	Korey Sewell
2006-02-20	Support for All Jump Instructions ...	Korey Sewell
2006-02-19	Reapplied changes which were undone by a pull	Gabe Black
2006-02-19	Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5	Gabe Black
2006-02-19	Remade some changes which were undone	Gabe Black
2006-02-19	Merge gblack@m5.eecs.umich.edu:/bk/multiarch	Gabe Black
2006-02-19	Changes to untemplate StaticInst and StaticInstPtr, change the isa to a names...	Gabe Black
2006-02-19	Merge zizzer:/bk/m5	Ali Saidi
2006-02-19	forgot a negative sign	Ali Saidi
2006-02-18	Move Linux/Tru64 architecture independent code into kern/*	Ali Saidi
2006-02-18	Support NNPC and branch instructions ... Outputs to decoder.cc correctly	Korey Sewell
2006-02-18	Merge gblack@m5.eecs.umich.edu:/bk/multiarch	Gabe Black
2006-02-18	Changed the isa from a class to a namespace, untemplated StaticInst and Stati...	Gabe Black
2006-02-18	few changes for nate:	Lisa Hsu
2006-02-18	remove print statements	Lisa Hsu
2006-02-18	more changes for subtick labels.	Lisa Hsu
2006-02-18	Merge zizzer:/bk/m5	Lisa Hsu
2006-02-18	Now you can have sublabels for every bar using the self.xsubticklabels parame...	Lisa Hsu
2006-02-18	changes from mergedmem	Korey Sewell
2006-02-18	use string name to figure out if we have a "AndLink" instruction	Korey Sewell
2006-02-18	MIPS generates ISA code through scons '.../decoder.cc'!!!	Korey Sewell