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path: root/src/arch/arm/insts
AgeCommit message (Expand)Author
2018-02-20arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassemblyGiacomo Travaglini
2018-02-16arch-arm: IMPLEMENTATION DEFINED registerGiacomo Travaglini
2018-02-16arch-arm: Fix Secure state check in checkFPAdvSIMDTrap64Chuan Zhu
2018-02-08arch-arm: Don't change PSTATE in Illegal Exception returnGiacomo Travaglini
2018-02-07arch-arm: Fix printing of the data cache maintenance instructionsNikos Nikoleris
2018-02-07arch-arm: Change function name for banked miscregsGiacomo Travaglini
2018-02-07arch-arm: Fix AArch32 SETEND InstructionGiacomo Travaglini
2018-02-07arch-arm: Correct Illegal Exception Return detectionGiacomo Travaglini
2017-12-21arch-arm: Fixed WFE/WFI trapping behaviourGiacomo Travaglini
2017-12-21arch-arm: Fix StaticInst encoding() methodGiacomo Travaglini
2017-12-19arch-arm: Instruction size methods in StaticInst classGiacomo Travaglini
2017-12-05arm: Add support for the dc {civac, cvac, cvau, ivac} instrNikos Nikoleris
2017-12-05arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructionsNikos Nikoleris
2017-11-21arch-arm: Fix MCR/MRC disassembleGiacomo Travaglini
2017-11-21arch-arm: Fix MSR/MRS disassembleGiacomo Travaglini
2017-11-15arch-arm: Writes to DCCMVAC shouldn't flush pipelineGiacomo Travaglini
2017-11-15arch-arm: Removing FlushPipe fault, using SquashAfterGiacomo Travaglini
2017-11-13arch-arm: Interface for the ArmStaticInst intWidth fieldGiacomo Travaglini
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-10-13isa,arm: Add missing AArch32 FP instructionsMitch Hayenga
2016-08-02arm: change instruction classes to catch hyp trapsDylan Johnson
2016-06-02arm: Rewrite ERET to behave according to the ARMv8 ARMAndreas Sandberg
2016-06-02arm: Correctly check FP/SIMD access permission in aarch32Andreas Sandberg
2016-03-16arm: Fix disasm printingNathanael Premillieu
2016-02-06style: fix missing spaces in control statementsSteve Reinhardt
2015-11-22arm: Fix fplib 128-bit shift operatorsNathanael Premillieu
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-02-16arm: Merge ISA files with pseudo instructionsAndreas Sandberg
2015-01-25arm: always set the IsFirstMicroop flagAli Saidi
2014-12-23arm: Raise an alignment fault if a PC has illegal alignmentAndreas Sandberg
2014-11-14arm: Fixes based on UBSan and static analysisAndreas Hansson
2014-10-16arch: Use shared_ptr for all FaultsAndreas Hansson
2014-10-01arm: More UBSan cleanups after additional full-system runsAndreas Hansson
2014-09-27arm: Fixed undefined behaviours identified by gccAndreas Hansson
2014-09-03arm: Make memory ops work on 64bit/128-bit quantitiesMitch Hayenga
2014-09-03arm: Fix v8 neon latency issue for loads/storesMitch Hayenga
2014-04-29arm: use condition code registers for ARM ISACurtis Dunham
2014-03-11arm: remove dead code fplib mul64x64Curtis Dunham
2014-05-09arm: Add branch flags onto macroopsAndrew Bardsley
2014-04-23arm: Correctly display disassembly of vldmia/vstmiaCurtis Dunham
2014-03-07scons: Fixes uninitialized warnings issued by clangMitch Hayenga
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2013-10-15cpu: add a condition-code register classYasuko Eckert